Stacked packaging designs offering inherent anti-tamper protection

• US 7,638,866 B1
• Filed: 06/01/2005
• Issued: 12/29/2009
• Est. Priority Date: 06/01/2005
• Status: Active Grant

• Current Assignee: Rockwell Collins, Inc. (Raytheon Technologies Corporation d/b/a RTX)
• Original Assignee: Rockwell Collins, Inc. (Raytheon Technologies Corporation d/b/a RTX)
• Inventors: Bean, Reginald D., Boone, Alan P.
• Primary Examiner(s): Chu; Chris C
• Application Number:
  US11/142,812
• Time in Patent Office: 1,672 Days
• Field of Search: 257/E25.013, 257/738, 257/678, 257723-725, 257/685, 257/686, 438/108, 438/599
• US Class Current: 257/686
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2225/0652 Bump or bump-like direct electrical connections from substrate to substrate
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06582 Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 23/57 Protection from inspection, reverse engineering or tampering
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/15151 the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15331 being a ball array, e.g. BGA
• CPC Class Codes: H05K 1/0275 Security details, e.g. tampering prevention or detection
• CPC Class Codes: H05K 1/144 Stacked arrangements of planar printed circuit boards
• CPC Class Codes: H05K 1/183 Components mounted in and supported by recessed areas of the printed circuit board
• CPC Class Codes: H05K 2201/041 Stacked PCBs, i.e. having neither an empty space nor mounted components in between
• CPC Class Codes: H05K 2201/10151 Sensor
• CPC Class Codes: H05K 2201/10674 Flip chip
• CPC Class Codes: H05K 3/3436 having an array of bottom contacts, e.g. pad grid array or ball grid array components

Abstract

An electronic device includes a die, a first circuit substrate connected to the die, and a second circuit substrate closely coupled to the first circuit substrate. The die is located between the first and second circuit substrates and is protected from tampering by the close coupling of the first and second circuit substrates. The circuit substrates may be circuit carrying elements (e.g. circuit boards) or may be additional die, may be any number of other substrates, and/or may be a combination of substrates. The device may include a cavity such that the die is located in the cavity. The cavity could be formed by any number of means. The device may also include a second die connected to the second substrate such that the first die and second die are located in proximity to each other on opposite sides of the cavity.

Claims

1. An electronic device, comprising:

a first die;

a second die;

a first substrate having a first cavity and connected to the first die via a flip chip connection in the first cavity; and

a second substrate having a second cavity and connected to the second die via a flip chip connection in the second cavity;

wherein the first die and the second die are offset to each other located between the first substrate and the second substrate and are protected from tampering by a ball grid array connection of the first substrate and the second substrate, wherein the first substrate is coupled to the second substrate by the ball grid array connection disposed about a periphery of the first cavity and the second cavity and the ball grid array connection surrounds the first cavity and the second cavity, wherein the first and second substrates completely enclose the first and second die.

2. The device of claim 1, wherein at least one of the first and second substrates are laminate substrates.

3. The device of claim 1, wherein both the first and second substrates are laminate substrates.

4. The device of claim 1, wherein the first substrate and the second substrate are circuit carrying elements.

5. The device of claim 1, wherein the first die is soldered to the first substrate.

6. The device of claim 5, wherein a perimeter of at least one of the first and second substrates is built up and contributes to the formation of the cavity.

7. The device of claim 1, wherein

the first substrate is located along a first plane and the first and second die are both at least partly included in a second plane that is orthogonal to the first plane.

8. The device of claim 7, wherein the first die is connected to the first substrate via solder and the second die is flip chip connected to the second substrate via solder.

9. The device of claim 1, wherein the ball grid array connection is disposed about a ring member.

10. The device of claim 1, wherein the second substrate is connected to the first substrate by a solder connection.

11. The device of claim 1, further comprising a potting material between the first substrate and the second substrate.

12. The device of claim 11, wherein the potting material comprises a heat dissipating potting material.

13. The device of claim 1, wherein at least one of the first die or the second die comprises a memory configured to store data relating to a GPS tracking operation and wherein at least one of the first die or the second die comprises a processing circuit configured to execute at least one GPS tracking function based on data received from a global positioning satellite system.

14. The device of claim 13, wherein at least one of the first die or the second die comprises an application specific integrated circuit configured to execute a function related to at least one GPS tracking function.

15. The device of claim 1, further comprising a power supply connected at least one of the first and second substrates.

16. The device of claim 1,

further comprising a third die;

wherein the first substrate is located along a first plane and the first and second dies are both at least partly included in a second plane that is orthogonal to the first plane;

the second and third dies are both at least partly included in a third plane that is orthogonal to the first plane;

wherein the first die is not located in the third plane; and

the third die is not located in the second plane.

17. The device of claim 1, wherein

the first die is connected to a first face of the first substrate, wherein the device further comprises a plurality of solder connections on a second face of the first substrate, the solder connections configured to connect the device to an assembly and provide a data connection between the device and the assembly;

and

the second face of the first substrate is not connected to any dies.

18. An electronic device, comprising:

a first and second die;

a first substrate having a first cavity connected to the first die via a flip chip connection in the first cavity; and

a second substrate having a second cavity and being coupled to a second die by a flip chip connection in the second cavity, the second substrate closely coupled to the first substrate via a ball grid array connection;

wherein the first and second die are offset to each other located between the first substrate and the second substrate and are protected from tampering by the close coupling of the first substrate and the second substrate, wherein the first substrate is coupled to the second substrate by a ball grid array connection disposed about a periphery of the first cavity and the second cavity and the ball grid array connection surrounds the first cavity and the second cavity;

wherein the first die comprises a processing circuit.

19. The device of claim 18, wherein the processing circuit is configured to execute at least one GPS tracking function based on data received from a global positioning satellite system, and the device further comprises a memory configured to store data relating to a GPS tracking operation, the memory connected to at least one of the first substrate and the second substrate.

20. The device of claim 19, further comprising an application specific integrated circuit configured to execute a function related to at least one GPS tracking function, the application specific integrated circuit connected to at least one of the first substrate and the second substrate.

21. The device of claim 18, wherein the first substrate is connected to the second substrate by solder connections.

22. The device of claim 18, further comprising a plurality other dies connected to the second substrate, wherein the plurality of other dies are located between the first substrate and the second substrate.

23. The device of claim 18, wherein the device further comprises a plurality of additional dies located between the first substrate and the second substrate;

and each of the first die and the plurality of additional dies are functionally connected to perform a global positioning system tracking function.

24. An electronic device, comprising:

a first circuit carrying element substrate having a first cavity;

a second circuit carrying element substrate having a second cavity and connected to the first circuit carrying element via a ball grid array connection about a periphery of the first cavity and the second cavity;

a first die connected to the first substrate in the first cavity by a flip chip connection;

a second die connected to the second substrate in the second cavity by a flip chip connection;

a space located between the first substrate and the second substrate;

wherein the first die and the second die are offset to each other located in the space, wherein the first circuit carrying element substrate is coupled to the second circuit carrying element substrate by a ball grid array connection disposed about a periphery of the first cavity and the second cavity and the ball grid array connection surrounds the first cavity and the second cavity.

25. The device of claim 24, wherein an active face the first die faces the first substrate and an active face of the second die faces the second substrate.

26. The device of claim 24, wherein the second die is flip chip connected to the second substrate using solder.

27. The device of claim 24, wherein at least one of the first substrate and the second substrate is built up on a face on which one of the first and second die is connected.

28. The device of claim 24, wherein the device is a GPS device.

29. The device of claim 24, wherein the first substrate is located along a first plane and the first plurality die and the second die are both at least partly included in a second plane that is orthogonal to the first plane.

30. A global position system device, comprising:

a first die directly connected to first a cavity in a first substrate via a flip chip connector;

a second die directly connected to a second cavity in a second substrate via a flip chip connector; and

a potting material between the first substrate and the second substrate;

wherein the second substrate is directly connected to the first substrate by a ball grid array solder connection about a periphery of the first substrate and the second substrate;

wherein the first and second die are offset to each other located between the first substrate and the second substrate and are protected from tampering by the close coupling of the first substrate and the second substrate, wherein the first circuit carrying element substrate is coupled to the second circuit carrying element substrate by a ball grid array connection disposed about a periphery of the first cavity and the second cavity and the ball grid array connection surrounds the first cavity and the second cavity;

wherein at least one die of the first or second die comprises a memory configured to store data relating to a GPS tracking operation; and

wherein at least one die of the first or second die comprises a processing circuit configured to execute at least one GPS tracking function based on data received from a global positioning satellite system.

31. The global positioning system device of claim 30, further comprising a third die directly connected to the first substrate.

32. The global positioning system device of claim 31, further comprising a fourth die directly connected to the second substrate.

33. The global positioning system device of claim 30, wherein the potting material comprises a heat dissipating potting material.

34. The global positioning system device of claim 30 wherein at least one of the first or the second die comprises an application specific integrated circuit configured to execute a function related to at least one GPS tracking function.

35. The global positioning system device of claim 34, wherein

the first die comprise the memory configured to store data relating to a GPS tracking operation;

the second die comprise the processing circuit configured to execute at least one GPS tracking function based on data received from a global positioning satellite system; and

wherein a third die comprises the application specific integrated circuit configured to execute a function related to at least one GPS tracking function;

the device further comprises a fourth die connected to the second substrate, the third die comprising a memory configured to store data relating to a GPS function; and

the fourth die is located between the first substrate and the second substrate.

36. The global positioning system device of claim 30, wherein

the first die is connected to a first face of the first substrate,

the device further comprises a plurality of solder connections on a second face of the first substrate;

and

the second face of the first substrate is not connected to any dies.

37. The global positioning system device of claim 30, wherein the potting material comprises a rigid potting material.