System for controlling voltage balancing in a plurality of lithium-ion cell battery packs and method thereof

• US 7,638,973 B2
• Filed: 12/22/2005
• Issued: 12/29/2009
• Est. Priority Date: 12/24/2004
• Status: Active Grant

• Current Assignee: LG Energy Solution Limited (LG Corporation)
• Original Assignee: LG Chem Limited (LG Corporation)
• Inventors: Lee, Han-Ho, Kim, Jee-Ho, Lee, Dal-Hoon, Yasuhito, Eguchi
• Primary Examiner(s): Tso; Edward
• Assistant Examiner(s): Berhanu; Samuel
• Application Number:
  US11/722,765
• Publication Number:
  US 20080303484A1
• Time in Patent Office: 1,468 Days
• Field of Search: 320/118, 320/119, 320/121, 702/63
• US Class Current: 320/118
• CPC Class Codes: H02J 7/0016 using shunting, discharge or bypass circuits
• CPC Class Codes: H02J 7/0029 with safety or protection devices or circuits
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

Disclosed is a system for adjusting a voltage balancing of cells in a lithium ion multicell battery pack. The system comprises a vertical interface outputting inputs of a reading balance signal defining a voltage reading period and a balance period and a reading hold signal holding a cell voltage when reading a voltage; an interface outputting an address clock for designating an address of a cell to be controlled and an input of a balance hold signal for independently reading a cell voltage within a voltage balance period; and a control section of a cell balancing adjusting circuit connected to the vertical interface and the interface and receiving signal outputs therefrom to adjust a balancing of cells.

Claims

1. A system for adjusting a voltage balancing of cells in lithium ion multicell battery packs, the system comprising:

a vertical interface connected to a battery pack and configured to output synchronized inputs of a reading balance signal defining a voltage reading period and a balance period and a reading hold signal inducing each cell voltage to be held before the voltage reading period;

an interface connected to the battery pack and configured to output an address clock for designating an address of a cell whose voltage is being held; and

a control section of a cell balancing adjusting circuit connected to the vertical interface and the interface and configured to receive signal outputs therefrom to adjust a balancing of cells.

2. The system according to claim 1, wherein the control section of the cell balancing adjusting circuit comprises an address counter for sequentially changing lines of the cells according to the address clock.

3. The system according to claim 1, further comprising a voltage detecting switch section configured to read a voltage of one of the cells and a current switch section configured to supply a balance current to one of the cells.

4. The system according to claim 3, wherein the control section turns off a balance current, determines a balance target value and decides to which cell the balance current is allowed to flow, during the voltage reading period.

5. The system according to claim 4, wherein the control section allows the balance current to flow the decided cell during the balance period.

6. The system according to claim 2, wherein the address counter produces a reset pulse by a time difference between the reading balance signal and the reading hold signal.

7. The system according to claim 1, wherein the interface is configured to output an input of a balance hold signal for independently reading a cell voltage within the balance period.

8. The system according to claim 1, wherein the vertical interface is disposed between adjacent battery packs.

9. The system according to claim 1, further comprising:

hold condensers configured to respectively hold each voltage of cells according to the reading hold signal.

10. A method for adjusting a voltage balancing of cells in lithium ion multicell battery packs, the method comprising the steps of:

receiving synchronized inputs of a reading balance signal defining a voltage reading period and a balance period and a reading hold signal inducing each cell voltage to be held;

holding each cell voltage before the voltage reading period according to the synchronized reading hold signal;

selecting each cell using an address counter clock and reading a voltage of the selected cell, during the voltage reading period;

determining a cell to which a balance current is allowed to flow, based on a balance target value; and

allowing the balance current to flow to the determined cell during the balance period.

11. The method according to claim 10, wherein the balance current flows to either a cell charge direction or cell discharge direction according to a comparison of the read voltage of the cell and the balance target value.

12. The method according to claim 10, wherein a hold of the cell voltage is performed after turning off the balance current based on the reading balance signal.

13. The method according to claim 10, wherein during the voltage reading period, the voltage of the selected cell is read after holding voltages of the cells, responsive to a reading hold signal.

14. The method according to claim 10, wherein the step of holding is performed when the voltage level of the reading hold signal is changed.