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Non-equal threshold voltage ranges in MLC NAND

  • US 7,639,532 B2
  • Filed: 10/10/2007
  • Issued: 12/29/2009
  • Est. Priority Date: 10/10/2007
  • Status: Active Grant
First Claim
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1. A method of programming a multi-level cell memory, comprising:

  • assigning a plurality of threshold voltage ranges within each cell, a range for each level of the memory cell; and

    sizing the plurality of threshold voltage ranges differently, each threshold voltage range representing a data bit pattern and where a largest of the threshold voltage ranges is at a lowest threshold voltage level, and a smallest of the threshold voltage ranges is at a highest threshold voltage level.

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