Modified ethernet switch
First Claim
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1. An Ethernet switch for directing data packets to and from a plurality of Ethernet ports, the switch comprising:
- a first buffer configured to receive unicast packets and multicast packets, the first buffer having control logic that gives priority to the multicast packets over the unicast packets;
a second buffer configured to receive packets from the first buffer and broadcast packets, the second buffer having control logic that gives priority to the broadcast packets over packets from the first buffer;
a third buffer configured to receive packets from the second buffer and an address of the packets;
a source removal block configured to remove a part of the packets that relates to a source port;
a status check block configured to determine a port bridge status and a link status;
an address lookup table; and
a control block, wherein the switch is arranged;
to forward each data packet incoming from one of the ports to a correct port as determined by the address lookup table if the control block is set to a first logic state, andto forward each data packet incoming from one of the ports to a processor if the control block is set to a second logic state, the second logic state different from the first logic state, wherein the processor is arranged to forward each data packet to a correct destination as determined by content of the data packet.
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Abstract
There is provided a modified Ethernet switch for directing data packets to and from a plurality of Ethernet ports. The switch is arranged to forward each data packet outgoing to one of the ports to the correct port as determined by an address lookup table. The switch is operable in two modes. In the first mode, the switch is arranged to forward each data packet incoming from one of the ports to its correct destination port as determined by the address lookup table. In the second mode, the switch is arranged to forward each data packet incoming from one of the ports to a processor. The address lookup table is maintained by the switch. The switch comprises a control block for switching the switch between the first mode and the second mode.
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Citations
15 Claims
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1. An Ethernet switch for directing data packets to and from a plurality of Ethernet ports, the switch comprising:
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a first buffer configured to receive unicast packets and multicast packets, the first buffer having control logic that gives priority to the multicast packets over the unicast packets; a second buffer configured to receive packets from the first buffer and broadcast packets, the second buffer having control logic that gives priority to the broadcast packets over packets from the first buffer; a third buffer configured to receive packets from the second buffer and an address of the packets; a source removal block configured to remove a part of the packets that relates to a source port; a status check block configured to determine a port bridge status and a link status; an address lookup table; and a control block, wherein the switch is arranged; to forward each data packet incoming from one of the ports to a correct port as determined by the address lookup table if the control block is set to a first logic state, and to forward each data packet incoming from one of the ports to a processor if the control block is set to a second logic state, the second logic state different from the first logic state, wherein the processor is arranged to forward each data packet to a correct destination as determined by content of the data packet. - View Dependent Claims (2, 3, 4, 5)
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6. An Ethernet switch for directing data packets to and from a plurality of Ethernet ports, the switch comprising:
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a first buffer configured to receive unicast packets and multicast packets, the first buffer having control logic that gives priority to the multicast packets over the unicast packets; a second buffer configured to receive packets from the first buffer and broadcast packets, the second buffer having control logic that gives priority to the broadcast packets over packets from the first buffer; a third buffer configured to receive packets from the second buffer and a MAC address of the packets; a source removal block configured to remove a part of the packets that relates to a source port; a status check block configured to determine a port bridge status and a link status; an address lookup table; and a control block for switching the switch between a first packet forwarding method and a second packet forwarding method wherein, in the first packet forwarding method, the control block configures the switch to forward data packets to a correct destination as determined by the address lookup table, and in the second packet forwarding method, the control block configures the switch to forward data packets to a processor, the processor being arranged to forward the data packets to a correct destination as determined by content of the data packet, wherein the second forwarding method is different from the first forwarding method. - View Dependent Claims (7, 8, 9, 10)
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11. An Ethernet switch for directing data packets to and from a plurality of Ethernet ports, the switch comprising:
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a first buffer configured to receive unicast packets and multicast packets, the first buffer having control logic that gives priority to the multicast packets over the unicast packets; a second buffer configured to receive packets from the first buffer and broadcast packets, the second buffer having control logic that gives priority to the broadcast packets over packets from the first buffer; a third buffer configured to receive packets from the second buffer and a MAC address of the packets; a source removal block configured to remove a part of the packets that relates to a source port; a status check block configured to determine a port bridge status and a link status; an address lookup table; means for forwarding data packets to a correct destination as determined by the address lookup table when a control block is set to a first state; and means for forwarding data packets to a processor when the control block is set to a second state, the second state different from the first state, wherein the processor is arranged to forward the data packets to a correct destination as determined by content of the data packet. - View Dependent Claims (12, 13, 14, 15)
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Specification
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Current AssigneeLantiq Beteiligungs-GmbH & Company KG (Intel Corporation)
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Original AssigneeInfineon Technologies AG
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InventorsLim, Swee Hock Alvin, Mathangi, Swetha Subramanian
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Primary Examiner(s)Sheikh; Ayaz R
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Assistant Examiner(s)Ahmed; Salman
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Application NumberUS11/021,718Publication NumberTime in Patent Office1,832 DaysField of Search370/389, 370/386, 370/360, 370/379, 370/395.31, 370/352, 370/474, 370/442, 370/254, 370/390, 370/412, 370/428US Class Current370/390CPC Class CodesH04L 49/201 Multicast operation; Broadc...H04L 49/205 Quality of Service basedH04L 49/3009 Header conversion, routing ...H04L 49/351 for local area network [LAN...
