Semiconductor device production method and semiconductor device

• US 7,642,139 B2
• Filed: 12/24/2004
• Issued: 01/05/2010
• Est. Priority Date: 12/26/2003
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Takaishi, Masaru
• Primary Examiner(s): Huynh; Andy
• Assistant Examiner(s): HO, HOANG QUAN TRAN
• Application Number:
  US10/577,360
• Publication Number:
  US 20070069324A1
• Time in Patent Office: 1,838 Days
• Field of Search: None
• US Class Current: 438/140
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/66712 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A production method for a semiconductor device, including the steps of: forming a semiconductor layer of the first conductivity on the semiconductor substrate; forming a trench in the semiconductor layer, the trench penetrating through the semiconductor layer to reach the semiconductor substrate; filling a filling material in a predetermined bottom portion of the trench, so that a filling material portion is provided in the bottom portion of the trench up to a predetermined upper surface position which is shallower than an interface between the semiconductor substrate and the semiconductor layer; and, after the filling step, introducing an impurity of the second conductivity into a portion of the semiconductor layer exposed to an interior side wall of the trench.

Claims

1. A production method for a semiconductor device which includes a super junction structural portion provided on a semiconductor substrate of a first conductivity and including drift layers of the first conductivity and RESURF layers of a second conductivity different from the first conductivity, the drift layers and the RESURF layers being laterally arranged in alternate relation in a direction parallel to the semiconductor substrate, the production method comprising the steps of:

forming a semiconductor layer of the first conductivity on the semiconductor substrate;

forming a trench in the semiconductor layer, the trench penetrating through the semiconductor layer to reach the semiconductor substrate;

filling a filling material in a predetermined bottom portion of the trench, so that a filling material portion is provided in the bottom portion of the trench up to a predetermined upper surface position which is shallower than an interface between the semiconductor substrate and the semiconductor layer, a void is provided in an upper portion of the trench above the predetermined upper surface position, and a part of the filling material is located in the semiconductor substrate,

wherein the filling step further includes the steps of;

supplying the filling material into the trench up to a position which is shallower than the predetermined upper surface position;

after the filling material supplying step, etching back the supplied filling material to the predetermined upper surface position; and

after the filling step, introducing an impurity of the second conductivity into a portion of the semiconductor layer exposed to an interior side wall of the trench, whereby the RESURF layers of the second conductivity are each formed alongside the interior side wall of the trench and the drift layers are each defined by a portion of the semiconductor layer remaining intact.

2. A semiconductor device production method as set forth in claim 1, wherein

the filling step includes the step of filling silicon oxide as the filling material in the trench.

3. A semiconductor device production method as set forth in claim 1, further comprising the step of oxidizing an interior wall of the trench to form an oxide film before the filling step, wherein

the filling step includes the step of filling polysilicon as the filling material in the trench.

4. A semiconductor device production method as set forth in claim 1, further comprising the step of filling the void provided in the upper portion of the trench with an upper filling material after the RESURE layers formation step.

5. A semiconductor device production method as set forth in claim 1, further comprising the steps of:

introducing an impurity of the second conductivity into a surface portion of the semiconductor layer to form a base region of the second conductivity in contact with one of the RESURF layers and one of the drift layers;

introducing an impurity of the first conductivity into a portion of the base region to form a source region of the first conductivity which is isolated from one of the drift layers and one of the RESURF layers by the other portion of the base region;

forming a gate insulation film opposed to a portion of the base region between the source region and one of the drift layers; and

forming a gate electrode opposed to the portion of the base region between the source region and one of the drift layers with the intervention of the gate insulation film.

6. A semiconductor device production method as set forth in claim 1, wherein

the RESURF layers formation step includes the steps of:

implanting an impurity of the second conductivity into a surface portion of the semiconductor layer exposed to the interior side wall of the trench; and

performing a thermal diffusion process to heat the resulting semiconductor substrate after the implantation step for diffusing the implanted impurity into the semiconductor layer.