System for substrate potential regulation during power-up in integrated circuits

• US 7,642,835 B1
• Filed: 11/12/2003
• Issued: 01/05/2010
• Est. Priority Date: 11/12/2003
• Status: Expired due to Term

• Current Assignee: Meta Platforms, Inc. (f/k/a Facebook, Inc.)
• Original Assignee: Intellectual Ventures Funding LLC (Intellectual Ventures LLC)
• Inventors: Fu, Robert, Chen, Tien-Min
• Primary Examiner(s): PERT, EVAN T
• Application Number:
  US10/712,523
• Time in Patent Office: 2,246 Days
• Field of Search: 327534-537, 327/565, 257/299, 257/901
• US Class Current: 327/534
• CPC Class Codes: H01L 21/823892 with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
• CPC Class Codes: H01L 27/0222 Charge pumping, substrate bias generation structures
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H03K 2217/0018 Special modifications or use of the back gate voltage of a FET

Abstract

An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

Claims

1. A circuit for regulating a substrate potential of an integrated circuit comprising:

a switch;

a first input for controlling the switch coupled to a first N-well bias supply line;

a second input for controlling the switch coupled to a substrate bias supply line;

a first switching terminal of the switch coupled to a ground; and

an output terminal of the switch coupled to a P-type substrate, wherein the switch is operable to selectively couple the second input to the output terminal responsive to a voltage of the substrate bias supply line.

2. The circuit of claim 1, wherein the switch is operable to electrically couple the P-type substrate to the ground when a bias voltage is present on the first N-well bias supply line.

3. The circuit of claim 1, wherein the switch is operable to electrically couple the P-type substrate to the substrate bias supply line when a substrate bias voltage is present on the substrate bias supply line.

4. The circuit of claim 1, further comprising a third input for controlling the switch coupled to a second N-well bias supply line.

5. The circuit of claim 4, wherein the switch is operable to electrically couple the P-type substrate to the ground when a bias voltage is present on the second N-well bias supply line.

6. The circuit of claim 4, wherein the switch is operable to electrically couple the P-type substrate to the substrate bias supply line when a substrate bias voltage is present on the substrate bias supply line.

7. The circuit of claim 1, wherein the switch is operable to electrically couple the P-type substrate to the substrate bias supply line when a substrate bias voltage is present on the substrate bias supply line and there is no bias voltage present on the N-well bias line.

8. The circuit of claim 1, wherein the switch is operable to electrically couple the P-type substrate to the ground when a substrate bias voltage is present on the substrate bias supply line and there is no bias voltage present on the N-well bias line.

9. A circuit for regulating the substrate potential of an integrated circuit comprising:

switch means;

a first input for controlling the switch means coupled to a first N-well bias supply line;

a second input for controlling the switch means coupled to a substrate bias supply line;

a first switching terminal means of the switch means coupled to a ground; and

an output terminal means of the switch means coupled to a P-type substrate, wherein the switch means is operable to selectively couple the second input to the output terminal means responsive to a voltage of the substrate bias supply line.

10. The circuit of claim 9, wherein the switch means is operable to electrically couple the P-type substrate to the ground when a bias voltage is present on the first N-well bias supply line.

11. The circuit of claim 9, wherein the switch means is operable to electrically couple the P-type substrate to the substrate bias supply line when a substrate bias voltage is present on the substrate bias supply line.

12. The circuit of claim 9, further comprising a third input for controlling the switch means coupled to a second N-well bias supply line.

13. The circuit of claim 12, wherein the switch means is operable to electrically couple the P-type substrate to the ground when a bias voltage is present on the second N-well bias supply line.

14. The circuit of claim 12, wherein the switch means is operable to electrically couple the P-type substrate to the substrate bias supply line when a substrate bias voltage is present on the substrate bias supply line.

15. The circuit of claim 9, wherein the switch means is operable to electrically couple the P-type substrate to the substrate bias supply line when a substrate bias voltage is present on the substrate bias supply line and there is no bias voltage present on the N-well bias line.

16. The circuit of claim 9, wherein the switch means is operable to electrically couple the P-type substrate to the ground when a substrate bias voltage is present on the substrate bias supply line and there is no bias voltage present on the N-well bias line.

17. An integrated circuit for regulating a substrate potential of an integrated circuit comprising:

a substrate;

an integrated circuit switch formed on the substrate, the switch including;

a first input configured for controlling the switch coupled to a first N-well bias supply line, the first N-well bias supply line configured for supplying a biasing voltage to an n-well;

a second input configured for controlling the switch coupled to a substrate bias supply line, the substrate bias supply line configured for supplying a substrate biasing voltage to the substrate;

a first switching terminal of the switch coupled to a ground; and

an output terminal of the switch coupled to the substrate, wherein the switch is operable to selectively couple the second input to the output terminal responsive to a voltage of the substrate bias supply line.

18. The circuit of claim 17, wherein the switch is operable to electrically couple the substrate to the ground when the biasing voltage is present on the first N-well bias supply line.

19. The circuit of claim 17, wherein the switch is operable to electrically couple the substrate to the substrate bias supply line when a substrate biasing voltage is present on the substrate bias supply line.

20. The circuit of claim 17, further comprising a third input configured for controlling the switch coupled to a second N-well bias supply line.

21. The circuit of claim 20, wherein the switch is operable to electrically couple the substrate to the ground when a biasing voltage is present on the second N-well bias supply line.

22. The circuit of claim 17, wherein the switch is operable to electrically couple the substrate to the substrate bias supply line when the substrate biasing voltage is present on the substrate bias supply line.

23. The circuit of claim 17, wherein the switch is operable to electrically couple the substrate to the substrate bias supply line when the substrate biasing voltage is present on the substrate bias supply line and there is no biasing voltage present on the first N-well bias supply line.

24. The circuit of claim 17, wherein the switch is operable to electrically couple the substrate to the ground when the substrate biasing voltage is present on the substrate bias supply line and there is no biasing voltage present on the first N-well bias supply line.

25. A circuit for regulating a substrate potential of an integrated circuit comprising:

a switch, the switch including;

a first input for controlling the switch coupled to a first N-well bias supply line;

a second input for controlling the switch coupled to a substrate bias supply line;

an output coupled to a substrate;

a first switching terminal of the switch coupled to a ground; and

wherein the switch is configured for coupling the output to the first switching terminal responsive to a voltage on the substrate.

26. The circuit of claim 25, wherein the switch is operable to electrically couple the substrate to the ground when a biasing voltage is present on the first N-well bias supply line.

27. The circuit of claim 25, wherein the switch is operable to electrically couple the substrate to the substrate bias supply line when a substrate biasing voltage is present on the substrate bias supply line.

28. The circuit of claim 25, further comprising a third input configured for controlling the switch coupled to a second N-well bias supply line.

29. The circuit of claim 28, wherein the switch is operable to electrically couple substrate to the ground when a biasing voltage is present on the second N-well bias supply line.

30. The circuit of claim 25, wherein the switch is operable to electrically couple the substrate to the substrate bias supply line when a substrate biasing voltage is present on the substrate bias supply line and there is no biasing voltage present on the N-well bias line.

31. The circuit of claim 25, wherein the switch is operable to electrically couple the substrate to the ground when a substrate biasing voltage is present on the substrate bias supply line and there is no biasing voltage present on the N-well bias line.

32. An integrated circuit comprising:

a circuit for regulating the substrate potential of the integrated circuit including;

a substrate;

a n-well formed in the substrate;

a switch, the switch comprising;

a first input for controlling the switch coupled to the n-well and coupled to a first n-well bias supply line configured for providing a biasing voltage to the n-well;

a second input for controlling the switch coupled to the substrate and coupled to a substrate bias supply line configured for providing a substrate biasing voltage to the substrate;

an output of the switch coupled to the substrate;

a first switching terminal of the switch coupled to a ground; and

wherein the switch is configured for coupling the output to the first switching terminal responsive to the substrate biasing voltage.

33. The circuit of claim 32, wherein the switch is operable to electrically couple the substrate to the ground when the biasing voltage is present on the first n-well bias supply line.

34. The circuit of claim 32, wherein the switch is operable to electrically couple the substrate to the substrate bias supply line when the substrate biasing voltage is present on the substrate bias supply line.

35. The circuit of claim 32, further comprising a third input configured for controlling the switch coupled to a second n-well bias supply line.

36. The circuit of claim 35, wherein the switch is operable to electrically couple the substrate to the ground when a biasing voltage is present on the second n-well bias supply line.

37. The circuit of claim 32, wherein the switch is operable to electrically couple the substrate to the substrate bias supply line when the substrate biasing voltage is present on the substrate bias supply line.

38. The circuit of claim 32, wherein the switch is operable to electrically couple the substrate to the substrate bias supply line when a substrate biasing voltage is present on the substrate bias supply line and there is no biasing voltage present on the n-well bias line.

39. The circuit of claim 32, wherein the switch is operable to electrically couple the substrate to the ground when the substrate biasing voltage is present on the substrate bias supply line and there is no biasing voltage present on the n-well bias line.