Error resilience methods for multi-protocol encapsulation forward error correction implementations

• US 7,644,343 B2
• Filed: 04/13/2006
• Issued: 01/05/2010
• Est. Priority Date: 01/17/2006
• Status: Expired due to Fees

• Current Assignee: CSR Technology Incorporated (Qualcomm, Inc.)
• Original Assignee: SIRF Technology Incorporated (Qualcomm, Inc.)
• Inventors: Valmiki, Ramanujan, Gubbi, Rajugopal
• Primary Examiner(s): Lamarre; Guy J
• Application Number:
  US11/279,683
• Publication Number:
  US 20070186143A1
• Time in Patent Office: 1,363 Days
• Field of Search: 714/776, 714/784, 714/756, 370/392, 370/401, 709/223
• US Class Current: 714/776
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/154 Error and erasure correction, e.g. by using the error and erasure locator or Forney polynomial
• CPC Class Codes: H03M 13/2707 Simple row-column interleaver, i.e. pure block interleaving
• CPC Class Codes: H03M 13/373 with erasure correction and erasure determination, e.g. for packet loss recovery or setting of erasures for the decoding of Reed-Solomon codes
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04N 21/4382 Demodulation or channel decoding, e.g. QPSK demodulation analog front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002
• CPC Class Codes: H04N 21/44004 involving video buffer management, e.g. video decoder buffer or video display buffer
• CPC Class Codes: H04N 21/4425 Monitoring of client processing errors or hardware failure
• CPC Class Codes: H04N 21/6112 involving terrestrial transmission, e.g. DVB-T
• CPC Class Codes: H04N 21/64315 DVB-H

Abstract

Transport stream (TS) packets containing sections of IP datagrams for an application level process are received and correct ones of said sections are stored into an MPE-FEC frame buffer of a receiver. Stored ones of said sections are reorganized within the frame buffer so as to leave appropriate positions, marked for erasure, within the frame buffer available for corrected data. Data bytes stored at the appropriate positions may be corrected using Reed-Solomon parity data stored in the frame buffer and then subsequently written back thereto.

Claims

1. A method, comprising receiving TS packets containing sections of IP datagrams for an application level process, storing correct ones of said sections into an MPE-FEC frame buffer of a receiver;

reorganizing stored ones of said sections within the MPE-FEC frame buffer so as to leave appropriate positions within the MPE-FEC frame buffer available for corrected data; and

marking for erasure the appropriate positions.

2. The method of claim 1, further comprising correcting data bytes stored at the appropriate positions marked for erasure in the MPE-FEC frame buffer using Reed-Solomon parity data stored in the MPE-FEC frame buffer.

3. The method of claim 2, further comprising writing back to the MPE-FEC frame buffer, at the appropriate locations marked for erasure, the data bytes corrected using the Reed-Solomon parity data.

4. The method of claim 1, wherein the sections of IP datagrams are stored into the MPE-FEC frame buffer according to locations indicated by an MPE-FEC frame buffer write pointer, said write pointer being adjusted for TS packet errors and new MPE section starts observed at the receiver, and the appropriate locations within the MPE-FEC frame buffer are marked for erasure on a byte-by-byte basis according to stored information concerning locations of said write pointer when said TS packet errors and new MPE section starts were observed.

5. The method of claim 1, wherein the appropriate locations within the MPE-FEC frame buffer are marked for erasure according to reliability information regarding said sections of IP datagrams stored separately therefrom.

6. The method of claim 5, wherein the reliability information comprises entries for only erasure blocks in the MPE-FEC frame buffer.

7. The method of claim 5, wherein the reliability information comprises entries for only non-erasure blocks in the MPE-FEC frame buffer.