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Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit

  • US 7,646,068 B2
  • Filed: 07/10/2006
  • Issued: 01/12/2010
  • Est. Priority Date: 08/15/2003
  • Status: Expired due to Fees
First Claim
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1. A semiconductor chip comprising:

  • a semiconductor substrate;

    a first active region disposed in the substrate;

    a second active region disposed in the substrate;

    a resistor formed in the first active region, the resistor including a doped region formed between two terminals;

    a strained channel transistor formed in the second active region, the strained channel transistor including first and second stressors formed in the substrate oppositely adjacent a strained channel region, wherein the first and second stressors extend into the substrate from a surface of the substrate; and

    a layer over the resistor and the strained channel transistor, the layer in contact wth the resistor.

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