Full-bridge and half-bridge compatible driver timing schedule for direct drive backlight system
First Claim
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1. An inverter comprising:
- a switching network comprising a plurality of semiconductor switches that alternately conduct to convert a direct current source into an alternating current source to power a load; and
a controller that outputs a plurality of driving signals to control the semiconductor switches, wherein a first driving signal and a third driving signal are alternately active with overlapping inactive states during state transitions, a second driving signal and a fourth driving signal are alternately active with overlapping inactive states during state transitions, and the active states of the first driving signal and the second driving signal are phase shifted by approximately 180°
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Abstract
A driver circuit or controller flexibly drives either a half-bridge or a full-bridge switching network in a backlight inverter without modification, redundant circuitry or additional components. The driver circuit includes four outputs to provide four respective driving signals that establish a periodic timing sequence using a zero-voltage switching technique for semiconductor switches in the switching network.
363 Citations
10 Claims
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1. An inverter comprising:
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a switching network comprising a plurality of semiconductor switches that alternately conduct to convert a direct current source into an alternating current source to power a load; and a controller that outputs a plurality of driving signals to control the semiconductor switches, wherein a first driving signal and a third driving signal are alternately active with overlapping inactive states during state transitions, a second driving signal and a fourth driving signal are alternately active with overlapping inactive states during state transitions, and the active states of the first driving signal and the second driving signal are phase shifted by approximately 180°
. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification