Multiple input single output (MISO) amplifier with circuit branch output tracking

• US 7,647,030 B2
• Filed: 12/12/2006
• Issued: 01/12/2010
• Est. Priority Date: 10/22/2004
• Status: Active Grant

• Current Assignee: ParkerVision, Inc.
• Original Assignee: ParkerVision, Inc.
• Inventors: Rawlins, Gregory S., Sorrells, David F., Rawlins, Michael W.
• Primary Examiner(s): Le; Lana N
• Application Number:
  US11/637,004
• Publication Number:
  US 20070087709A1
• Time in Patent Office: 1,127 Days
• US Class Current: 455/127.1
• CPC Class Codes: H03C 5/00 Amplitude modulation and angle modulation produced simultaneously or at will by the same modulating signal H03C7/00 takes precedence
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/0205 in transistor amplifiers
• CPC Class Codes: H03F 1/0233 by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
• CPC Class Codes: H03F 1/0294 using vector summing of two or more constant amplitude phase-modulated signals
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 1/3205 in field-effect transistor amplifiers
• CPC Class Codes: H03F 1/3223 using feed-forward H03F1/3211 takes precedence
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2201/3215 To increase the output power or efficiency
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/45071 with semiconductor devices only
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H04B 1/04 Circuits
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 1/0483 : Transmitters with multiple parallel paths
• CPC Class Codes: H04B 2001/045 : with means for improving efficiency
• CPC Class Codes: H04B 2001/0491 : with frequency synthesizers, frequency converters or modulators
• CPC Class Codes: H04L 27/20 : Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/36 : Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/362 : Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence

Abstract

Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Claims

1. A multiple input single output (MISO) amplifier, comprising:

a plurality of inputs that receive a plurality of input signals;

a plurality of circuit branches coupled to said plurality of inputs, said circuit branches each comprising one or more transistors; and

an output;

wherein said input signals are amplified and combined to create an output signal at said output of said MISO amplifier;

wherein a first output voltage of a first transistor in a first circuit branch tracks a second output voltage of a second transistor in a second circuit branch, wherein said tracking occurs regardless of input bias voltage applied to inputs of said first and second transistor;

wherein said first and second output voltages of said first and second transistors, respectively, form a singular output voltage at said output of said MISO amplifier.

2. The MISO amplifier of claim 1, wherein said output is configured to combine said output signal at a substantially zero-impedance output node of said MISO amplifier.

3. The MISO amplifier of claim 1, wherein each of said circuit branches further comprise at least one of a pre-driver stage and a driver stage, wherein said pre-driver stage and driver stage are configured to condition said plurality of input signals according to a predefined power level prior to receipt by inputs of said one or more transistors.

4. The MISO amplifier of claim 3, wherein said pre-driver stage, said driver stage, and said one or more transistors of each circuit branch comprise one or more pull-up impedance modules coupled to at least one of an output of said pre-driver stage, an output of said driver stage, and an output of said one or more transistors, and wherein said one or more pull-up impedance modules are configured to couple each respective output to at least one of a power supply of said MISO amplifier and an independent power supply.

5. The MISO amplifier of claim 3, wherein said pre-driver stage, said driver stage, and one or more transistors of each circuit branch comprise one or more matching impedance modules coupled to at least one of an output of said pre-driver stage, an output of said driver stage, and an output of said one or more transistors, and wherein said one or more matching impedance modules are configured to enhance a power transfer of at least one of said pre-driver stage, said driver stage, and said one or more transistors.

6. The MISO amplifier of claim 3, further comprising a bias module configured to receive output power information of said MISO amplifier and to calculate one or more control signals based on said output power information.

7. The MISO amplifier of claim 6, wherein said one or more control signals are coupled to an input of said pre-driver stage, an input of said driver stage, and an input of said one or more transistors of each circuit branch, said one or more control signals being configured to control a conduction of current in said pre-driver stage, said driver stage, and said one or more transistors.

8. The MISO amplifier of claim 6, wherein said bias module comprises a transfer function module configured to receive one or more communication signals, and to convert said one or more communication signals to said one or more control signals.

9. The MISO amplifier of claim 6, further comprising a feedback control circuit coupled to said bias module, said feedback control circuit being configured to prevent said one or more transistors from reaching a breakdown voltage.

10. The MISO amplifier of claim 1, further comprising a harmonic control circuit coupled to an input of said one or more transistors of each circuit branch, said harmonic control circuit being configured to control an output frequency spectrum of said one or transistors.

11. A method for power amplification, comprising:

receiving a plurality of input signals at a plurality of inputs; and

amplifying and combining said plurality of input signals using a multiple input single output (MISO) amplifier, wherein said MISO amplifier comprises;

a plurality of circuit branches coupled to said plurality of inputs, said circuit branches each comprising one or more transistors; and

an output;

wherein a first output voltage of a first transistor in a first circuit branch tracks a second output voltage of a second transistor in a second circuit branch, wherein said tracking occurs regardless of input bias voltage applied to inputs of said first and second transistors;

wherein said first and second output voltages of said first and second transistors, respectively, form a singular output voltage at said output of said MISO amplifier.

12. The method of claim 11, wherein combining said plurality of amplified input signals comprises combining said plurality of amplified input signals at a substantially zero-impedance output node of said MISO amplifier.

13. The method of claim 11, wherein amplifying and combining said plurality of input signals comprise conditioning said plurality of input signals with at least one of a pre-driver stage and a driver stage in each of said circuit branches according to a predefined power level.

14. The method of claim 13, wherein amplifying and combining said plurality of input signals comprise coupling at least one of an output of said pre-driver stage, an output of said driver stage, and an output of said one or more transistors in each circuit branch to at least one of a power supply of said MISO amplifier and an independent power supply.

15. The method of claim 13, wherein amplifying and combining said plurality of input signals comprise enhancing a power transfer in at least one of said pre-driver stage, said driver stage, and said one or more transistors in each circuit branch with one or more matching impedance modules, said one or more matching impedance modules coupled to at least one of an output of said pre-driver stage, an output of said driver stage, and an output of said one or more transistors.

16. The method of claim 13, wherein amplifying and combining said plurality of input signals comprise controlling an output frequency spectrum of said one or more transistors in each circuit branch with a harmonic control circuit, said harmonic control circuit coupled to an input of said one or more transistors.

17. The method of claim 13, wherein amplifying and combining said plurality of input signals comprise receiving output power information of said MISO amplifier and calculating one or more control signals based on said output power information.

18. The method of claim 17, wherein receiving and calculating comprise controlling a conduction of current in at least one of said pre-driver stage, said driver stage, and said one or more transistors with said one or more control signals, said one or more control signals coupled to an input of said pre-driver stage, an input of said driver stage, and an input of said one or more transistors.

19. The method of claim 17, wherein receiving and calculating comprise receiving one or more communications signals, and converting said one or more communication signals to said one or more control signals using a transfer function module.

20. The method of claim 17, wherein receiving and calculating comprises preventing said one or more transistors from reaching a breakdown voltage with a feedback control circuit, said feedback control circuit coupled to a bias module.