Variable-gain amplifier

• US 7,649,418 B2
• Filed: 06/11/2007
• Issued: 01/19/2010
• Est. Priority Date: 06/12/2006
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: Matsui, Naohiro
• Primary Examiner(s): Nguyen; Khanh V
• Application Number:
  US11/760,866
• Publication Number:
  US 20070296501A1
• Time in Patent Office: 953 Days
• Field of Search: 330/254, 330/278, 330/284, 330/311, 333/81.R
• US Class Current: 330/284
• CPC Class Codes: H03F 3/45188 Non-folded cascode stages
• CPC Class Codes: H03G 1/0029 using FETs

Abstract

There is provided a variable-gain amplifier, including two cascode amplifiers and an attenuator. The cascode amplifiers are mutually connected in parallel via the attenuator.

Claims

1. A variable-gain amplifier comprising:

n number/numbers of cascode amplifiers each including a plurality of cascode-connected field effect transistors, n being an integer not fewer than two; and

an attenuator;

wherein said n number/numbers of cascode amplifiers are mutually connected in parallel via said attenuator,

wherein a first-stage cascode amplifier among the n number/numbers of cascode amplifiers comprises a first field effect transistor among the plurality of cascode-connected field effect transistors, and

wherein an operating point of the first field effect transistor is transferred from a saturation region to a linear region during an intermediate stage of operation of the variable-gain amplifier.

2. The variable-gain amplifier according to claim 1,

wherein said field effect transistor is of a MOS type.

3. The variable-gain amplifier according to claim 1,

wherein a first cascode amplifier of said n number/numbers of cascode amplifiers is connected to an input terminal of said variable-gain amplifier;

a j-th cascode amplifier of said n number/numbers of cascode amplifiers is connected to said input terminal via (j-1) number/numbers of said attenuators, j being an integer not fewer than two and not greater than n.

4. The variable-gain amplifier according to claim 3,

wherein an n-th cascode amplifier of said n number/numbers of cascode amplifiers is an output current variable type amplifier.

5. The variable-gain amplifier according to claim 4, further comprising a load to which an output terminal of each of said cascode amplifiers is connected;

wherein said n-th cascode amplifier includes a first and a second field effect transistor having respective sources thereof mutually connected; and

a drain of said first and said second field effect transistor is connected to said load and to a power source, respectively.

6. The variable-gain amplifier according to claim 1,

wherein said n is two.

7. The variable-gain amplifier according to claim 1,

wherein said cascode amplifier is of a differential type.

8. The variable-gain amplifier according to claim 1, wherein the n number/numbers of cascode amplifiers comprises a second-stage cascode amplifier, and during the intermediate stage of operation of the variable-gain amplifier, current supplied to the first-stage cascode amplifier is decreasing and current supplied to the second-stage cascode amplifier is increasing.

9. The variable-gain amplifier according to claim 8, wherein a gate bias control circuit supplies the current to the first-stage and second-stage cascode amplifiers in response to a control voltage.

10. The variable-gain amplifier according to claim 9, wherein a range of the control voltage during the intermediate stage of operation is 1 to 1.5 Volts.