Open-frame solid-state drive housing with intrinsic grounding to protect exposed chips

• US 7,649,743 B2
• Filed: 03/06/2008
• Issued: 01/19/2010
• Est. Priority Date: 08/04/1999
• Status: Expired due to Fees

• Current Assignee: Super Talent Technology, Corporation
• Original Assignee: Super Talent Electronics, Inc.
• Inventors: Ni, Jim Chin-Nan, Shen, Ming-Shiang, Ma, Abraham C., Lee, Charles C., Yu, Frank
• Primary Examiner(s): Bui; Hung S
• Application Number:
  US12/043,398
• Publication Number:
  US 20080198545A1
• Time in Patent Office: 684 Days
• Field of Search: 361/752, 361/737, 361/727, 361/790, 361/730, 361/741, 361/685, 439/55, 439 65- 66, 439/76.1, 439/620
• US Class Current: 361/752
• CPC Class Codes: G06F 12/1416 by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights G06F12/1458 takes precedence
• CPC Class Codes: G06F 21/32 using biometric data, e.g. fingerprints, iris scans or voiceprints
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00
• CPC Class Codes: G06F 3/0658 Controller construction arrangements
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

An open-frame flash-memory drive has a printed-circuit board assembly (PCBA) with flash-memory chips, a controller chip, and a Serial AT-Attachment (SATA) connector soldered to it. The PCBA is only partially encased by left and right frames or by a U-shaped bracket frame. The frames have PCBA supports and guide posts that fit near edges of the PCBA. The frames do not cover the top and bottom of the PCBA, allowing chips on the PCBA to be ventilated by unblocked air flow. Screws that attach the PCBA to the frame have metal collars that ground the frame to the PCBA'"'"'s ground plane. The screws form a current path to draw any electro-static-discharge (ESD) current off the frame and onto a PCBA ground. When the SATA connector is inserted into a host, the host ground sinks ESD currents collected by the open frame.

Claims

1. An open-frame flash-memory drive comprising:

a left bracket frame;

a right bracket frame;

a printed-circuit board assembly (PCBA) that comprises;

a circuit board having wiring traces;

a plurality of flash-memory chips mounted to the circuit board;

a controller chip mounted to the circuit board, the controller chip having a input/output interface circuit for interfacing to an external computer, and a processing unit for accessing the plurality of flash-memory chips in response to commands from the external computer received by the input/output interface circuit; and

a connector mounted to the circuit board, for connecting the controller chip to the external computer;

wherein the left bracket frame is attached to the circuit board near a left edge of the circuit board;

wherein the right bracket frame is attached to the circuit board near a right edge of the circuit board;

wherein the connector is attached to the circuit board along a front edge of the circuit board between the left edge and the right edge;

wherein the left bracket frame and the right bracket frame only partially enclose the PCBA wherein the plurality of flash-memory chips and the controller chip are open and exposed to air flow;

wherein the plurality of flash-memory chips are block-addressable and not randomly-addressable,

whereby the left bracket frame and the right bracket frame expose the plurality of flash-memory chips to cooling by air flow.

2. The open-frame flash-memory drive of claim 1 further comprising:

a first conductive screw that contacts the left bracket frame and contacts ground traces on the circuit board;

a second conductive screw that contacts the right bracket frame and contacts ground traces on the circuit board,

wherein the ground traces connect to a chassis ground through the connector when the connector is connected to the external computer.

3. The open-frame flash-memory drive of claim 2 wherein the first conductive screw further comprises a metal collar for making electrical contact with the ground traces on the circuit board;

wherein the second conductive screw further comprises a metal collar for making electrical contact with the ground traces on the circuit board.

4. The open-frame flash-memory drive of claim 2 wherein the left bracket frame further comprises:

a left guide post that fits to a left notch on the circuit board;

a left PCBA support for supporting the circuit board near the left edge;

wherein the right bracket frame further comprises;

a right PCBA support for supporting the circuit board near the right edge;

a right guide post that fits to a right notch on the circuit board,

whereby guide posts align to notches in the circuit board.

5. The open-frame flash-memory drive of claim 4 wherein the left bracket frame further comprises:

a left screw hole for receiving the first conductive screw;

wherein the right bracket frame further comprises;

a right screw hole for receiving the second conductive screw;

whereby the PCBA is attached by conductive screws through holes in PCBA supports on the left bracket frame and on the right bracket frame.

6. The open-frame flash-memory drive of claim 1 further comprising:

a back frame member that connects the left bracket frame to the right bracket frame along a back edge of the circuit board;

wherein the back frame member, the left bracket frame, and the right bracket frame together form a U-shaped bracket frame that surrounds the circuit board on three edges.

7. The open-frame flash-memory drive of claim 1 wherein the connector is a Serial AT-Attachment (SATA) connector or an integrated device electronics (IDE) connector or a small-computer system interface (SCSI) connector or a compact flash (CF), PCI Express, ExpressCard, or Universal Serial Buffer (USB) connector.

8. The open-frame flash-memory drive of claim 1 wherein the controller chip further comprises:

a processing unit;

an input/output interface circuit, coupled to the processing unit and configured for receiving through the connector a logical sector address (LSA) along with a data transfer request from a host computing device, the processing unit configured for extracting set, entry, page and sector numbers from the LSA using an indexing scheme.

9. The open-frame flash-memory drive of claim 8 wherein the processing unit of the controller chip further comprises:

a page buffer;

an address correlation page usage memory (ACPUM);

a partial logical-to-physical address and page usage information (PLTPPUI) tracking table;

a wear leveling counter and bad block indicator (WL/BB) tracking table; and

wherein the plurality of flash-memory chips include a reserved area for a plurality of first physical blocks and a plurality of second physical blocks, the first physical blocks referenced by a plurality of first special logical addresses while the second physical blocks referenced by a plurality of second special logical addresses;

wherein the plurality of first physical blocks is configured for storing the PLTPPUI tracking table and the plurality of second physical blocks for storing the WL/BB tracking table;

wherein the ACPUM is configured to keep one set, corresponding to a set number, from the PLTPPUI tracking table;

wherein the PLTPPUI tracking table is configured to hold correlations between the first special logical addresses and the first physical blocks;

wherein the WL/BB tracking table is configured to hold correlations between the second special logical addresses and the second physical blocks.

10. The open-frame flash-memory drive of claim 9 wherein the ACPUM comprises a plurality of entries, each of the entries corresponding to a physical block number and page usage information of all pages of the physical block number.

11. An attachable open-frame flash-memory drive comprising:

a printed-circuit board assembly (PCBA) that comprises;

a circuit board having wiring traces;

a plurality of flash-memory chips mounted to the circuit board;

a controller chip mounted to the circuit board, the controller chip having a input/output interface circuit for interfacing to an external computer, and a processing unit for accessing the plurality of flash-memory chips in response to commands from the external computer received by the input/output interface circuit; and

a connector mounted to the circuit board, for connecting the controller chip to the external computer;

wherein the plurality of flash-memory chips are block-addressable and not randomly-addressable,

a plurality of connecting screws;

a plurality of holes in the circuit board for receiving the connecting screws;

a plurality of spacers disposed around the connecting screws and between the circuit board and a motherboard;

wherein the spacers provide an air gap between the circuit board and the motherboard,

whereby the attachable open-frame flash-memory drive is screwed into the motherboard, but electrically connected by the connector.

12. The attachable open-frame flash-memory drive of claim 11 wherein the plurality of flash-memory chips comprise single-chip non-volatile memory devices (NVMD) that receive a logical block address (LBA) and internally map the LBA to a physical address.

13. The attachable open-frame flash-memory drive of claim 11 wherein the connector is a Serial AT-Attachment (SATA) connector, or an integrated device electronics (IDE) connector, or a small-computer system interface (SCSI) connector, or a compact flash (CF), PCI Express, ExpressCard, or Universal Serial Buffer (USB) connector.

14. The attachable open-frame flash-memory drive of claim 12 wherein the controller chip further comprises:

a processing unit;

an input/output interface circuit, coupled to the processing unit and configured for receiving through the connector a logical sector address (LSA) along with a data transfer request from a host computing device, the processing unit configured for extracting set, entry, page and sector numbers from the LSA using an indexing scheme.

15. The attachable open-frame flash-memory drive of claim 14 wherein the processing unit of the controller chip further comprises:

a page buffer;

an address correlation page usage memory (ACPUM);

a partial logical-to-physical address and page usage information (PLTPPUI) tracking table;

a wear leveling counter and bad block indicator (WL/BB) tracking table; and

wherein the plurality of flash-memory chips include a reserved area for a plurality of first physical blocks and a plurality of second physical blocks, the first physical blocks referenced by a plurality of first special logical addresses while the second physical blocks referenced by a plurality of second special logical addresses;

wherein the plurality of first physical blocks is configured for storing the PLTPPUI tracking table and the plurality of second physical blocks for storing the WL/BB tracking table;

wherein the ACPUM is configured to keep one set, corresponding to a set number, from the PLTPPUI tracking table;

wherein the PLTPPUI tracking table is configured to hold correlations between the first special logical addresses and the first physical blocks;

wherein the WL/BB tracking table is configured to hold correlations between the second special logical addresses and the second physical blocks.

16. The attachable open-frame flash-memory drive of claim 15 wherein the ACPUM comprises a plurality of entries, each of the entries corresponding to a physical block number and page usage information of all pages of the physical block number.

17. A flash-memory device comprising:

left bracket frame means for partially encasing the flash-memory device;

right bracket frame means for partially encasing the flash-memory device;

a printed-circuit board assembly (PCBA) that comprises;

circuit board means for connecting chips with wiring traces;

a plurality of flash-memory chip means for storing blocks of data, the plurality of flash-memory chip means being mounted to the circuit board means, wherein the plurality of flash-memory chip means are block-addressable and not randomly-addressable;

controller chip means, mounted to the circuit board means, for controlling access to the plurality of flash-memory chip means, the controller chip means comprising an input/output interface means for interfacing to an external computer, and processing unit means for accessing the plurality of flash-memory chip means in response to commands from the external computer received by the input/output interface means; and

connector means, mounted to the circuit board means, for connecting the controller chip means to the external computer;

wherein the left bracket frame means is attached to the circuit board means near a left edge of the circuit board means;

wherein the right bracket frame means is attached to the circuit board means near a right edge of the circuit board means;

wherein the connector means is attached to the circuit board means along a front edge of the circuit board means between the left edge and the right edge;

wherein the left bracket frame means and the right bracket frame means only partially enclose the PCBA wherein the plurality of flash-memory chip means and the controller chip means are open and exposed to air flow;

whereby the left bracket frame means and the right bracket frame means expose the plurality of flash-memory chip means to cooling by air flow.

18. The flash-memory device of claim 17 further comprising:

back frame member means for connecting the left bracket frame means to the right bracket frame means along a back edge of the circuit board means;

wherein the back frame member means, the left bracket frame means, and the right bracket frame means together form a U-shaped bracket frame means for surrounding the circuit board means on three edges.

19. The flash-memory device of claim 18 wherein the controller chip means further comprises:

processing means for processing requests;

input/output interface circuit means, coupled to the processing means, for receiving through the connector means a logical sector address (LSA) along with a data transfer request from a host computing device, the processing means configured for extracting set, entry, page and sector numbers from the LSA using an indexing scheme.

20. The flash-memory device of claim 19 wherein the processing means of the controller chip means further comprises:

a page buffer;

an address correlation page usage memory (ACPUM);

a partial logical-to-physical address and page usage information (PLTPPUI) tracking table; and

a wear leveling counter and bad block indicator (WL/BB) tracking table;

wherein the plurality of flash-memory chip means includes a reserved area for a plurality of first physical blocks and a plurality of second physical blocks, the first physical blocks referenced by a plurality of first special logical addresses while the second physical blocks referenced by a plurality of second special logical addresses;

wherein the plurality of first physical blocks is configured for storing the PLTPPUI tracking table and the plurality of second physical blocks for storing the WL?BB tracking table;

wherein the ACPUM is configured to keep one set, corresponding to a set number, from the PLTPPUI tracking table;

wherein the PLTPPUI tracking table is configured to hold correlations between the first special logical addresses and the first physical blocks;

wherein the WL/BB tracking table is configured to hold correlations between the second special logical addresses and the second physical blocks.