Non-volatile memory having a dynamically adjustable soft program verify voltage level and method therefor

• US 7,649,782 B2
• Filed: 07/31/2007
• Issued: 01/19/2010
• Est. Priority Date: 07/31/2007
• Status: Active Grant

• Current Assignee: Rambus Inc.
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Choy, Jon S., Eguchi, Richard K.
• Primary Examiner(s): AUDUONG, GENE NGHIA
• Application Number:
  US11/831,168
• Publication Number:
  US 20090034339A1
• Time in Patent Office: 903 Days
• Field of Search: 365/185.22, 365/185.2, 365/185.09, 365/185.11, 365/185.18
• US Class Current: 365/185.22
• CPC Class Codes: G11C 16/3409 Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step
• CPC Class Codes: G11C 16/344 Arrangements for verifying correct erasure or for detecting overerased cells

Abstract

An erase operation in a non-volatile memory includes selecting a block on which to perform an erase operation, erasing the selected block, receiving test data corresponding to the selected block, determining a soft program verify voltage level based on the test data, and soft programming the erased selected block using the soft program verify voltage level. A non-volatile memory includes a plurality of blocks, a test block which stores test data corresponding to each of the plurality of blocks, and a flash control coupled to the plurality of blocks and the test block, the flash control determining a soft program verify voltage level for a particular block of the plurality of blocks based on the test data for the particular block when the particular block is being soft programmed.

Claims

1. A method for performing an erase operation in a non-volatile memory, comprising:

selecting a block on which to perform an erase operation;

erasing the selected block;

receiving test data corresponding to the selected block;

determining a soft program verify voltage level based on the test data; and

soft programming the erased selected block using the soft program verify voltage level.

2. The method of claim 1, wherein the determining the soft program verify voltage level comprises selecting the soft program verify voltage level from a plurality of soft program verify voltage levels.

3. The method of claim 1, wherein the determining the soft program verify voltage level comprises:

determining a soft program reference voltage; and

generating a soft program verify voltage at the soft program verify voltage level using the soft program reference voltage.

4. The method of claim 1, wherein the soft programming the erased selected block comprises:

determining that a cell of the erased selected block fails the soft program verify voltage level;

applying a soft program voltage pulse to the cell; and

determining whether the cell fails or passes the soft program verify voltage level.

5. The method of claim 4, wherein erasing the selected block comprises:

applying erase pulses to each cell of the selected block until each cell passes a predetermined erase verify voltage level, wherein the soft program verify voltage level is less than the erase verify voltage level.

6. The method of claim 5, further comprising:

prior to erasing the selected block, programming each cell of the selected block which fails a predetermined program verify voltage level, wherein the erase verify voltage level is less than the program verify voltage level.

7. The method of claim 1, wherein the test data comprises a program/erase cycle count for the selected block, and wherein the soft program verify voltage level is determined based at least in part on the program/erase cycle count.

8. The method of claim 7, further comprising:

updating the program/erase cycle count for the selected block; and

storing the updated program/erase cycle count.

9. The method of claim 7, wherein the test data further comprises a block size for the selected block, and wherein the soft program verify voltage level is determined based at least in part on the program/erase cycle count and the block size.

10. The method of claim 1, wherein the test data indicates an expected number of program/erase cycles to be performed on the selected block, and wherein the soft program verify voltage level is determined based at least in part on the expected number of program/erase cycles to be performed on the selected block.

11. A method for performing an erase operation in a non-volatile memory, comprising:

selecting a block on which to perform an erase operation;

erasing the selected block;

receiving a program/erase cycle count corresponding to the selected block;

determining a soft program verify voltage level based at least in part on the program/erase cycle count; and

soft programming the erased selected block using the soft program verify voltage level.

12. The method of claim 11, further comprising:

increasing the program/erase cycle count; and

storing the increased program/erase cycle count.

13. The method of claim 12, further comprising performing a second erase operation on the selected block, wherein the performing the second erase operation on the selected block comprises:

erasing the selected block;

receiving the increased program/erase cycle count corresponding to the selected block;

determining a second soft program verify voltage level based at least in part on the increased program/erase cycle count, wherein the second soft program verify voltage level is different from the soft program verify voltage level; and

soft programming the erased selected block using the second soft program verify voltage level.

14. The method of claim 11, wherein the determining the soft program verify voltage level comprises determining the soft program verify voltage level based at least in part on the program/erase cycle count and a block size of the selected block.

15. The method of claim 11, wherein the soft programming the erased selected block comprises:

determining that a cell of the erased selected block fails the soft program verify voltage level;

applying a soft program voltage pulse to the cell; and

determining whether the cell fails or passes the soft program verify voltage level.

16. The method of claim 15, wherein erasing the selected block comprises:

applying erase pulses to each cell of the selected block until each cell passes a predetermined erase verify voltage level, wherein the soft program verify voltage level is less than the erase verify voltage level.

17. A non-volatile memory comprising:

a plurality of blocks;

a test block, wherein the test block stores test data corresponding to each of the plurality of blocks; and

a flash control coupled to the plurality of blocks and the test block, the flash control determining a soft program verify voltage level for a particular block of the plurality of blocks based on the test data for the particular block when the particular block is being soft programmed.

18. The non-volatile memory of claim 17, wherein the stored tests data stores a program/erase cycle count for each of the plurality of blocks.

19. The non-volatile memory of claim 17, wherein the stored tests data indicates an expected number of program/erase cycles to be performed on each of the plurality of blocks.

20. The non-volatile memory of claim 17, further comprising:

a charge pump coupled to the plurality of blocks, the charge pump providing a soft program verify voltage to the particular block at the determined soft program verify voltage level when the particular block is being soft programmed.