Method and system for reduction of decoding complexity in a communication system

• US 7,649,829 B2
• Filed: 10/12/2001
• Issued: 01/19/2010
• Est. Priority Date: 10/12/2001
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Chen, Toa, Rezaiifar, Ramin, Agashe, Parag, Wei, Yongbin, Bender, Paul E., Pankaj, Rajesh K.
• Primary Examiner(s): Pham; Chi H.
• Assistant Examiner(s): HOM, SHICK C
• Application Number:
  US09/976,591
• Publication Number:
  US 20030072384A1
• Time in Patent Office: 3,021 Days
• Field of Search: 370/310, 370/310.1, 370/333, 370/400, 370/412, 370/413, 370/419, 370/493, 370/494, 370/495, 370/496, 370/529, 714/784, 714/799, 714/800
• US Class Current: 370/203
• CPC Class Codes: H03M 13/2909 Product codes
• CPC Class Codes: H03M 13/293 with erasure setting
• CPC Class Codes: H03M 13/2936 comprising an outer Reed-Solomon code and an inner convolutional code
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0066 Parallel concatenated codes

Abstract

Method and System for Utilization of an Outer Decoder in a Broadcast Services Communication System is described. Information to be transmitted is provided to a systematic portion of a plurality of transmit buffers and encoded by an outer decoder communicatively coupled to the transmit buffer. The resulting redundant bits are provided to a parity portion of each transmit buffer. The content of the transmit buffers, is multiplexed and encoded by an inner decoder to improve protection by adding redundancy. The receiving station recovers the transmitted information by an inverse process. Because a decoding complexity depends on the size of a systematic portion of the transmit buffer, reasoned compromise between a systematic portion size and number of transmit buffers yields decreased decoding complexity.

Claims

1. An encoding method for reducing decoding complexity, the method comprising:

encoding systematic bits of a bit stream in each of a plurality of buffers with a first code, the first code being encoded by an outer encoder;

multiplexing content of the systematic encoded bits in each of the plurality of buffers from the bit stream; and

encoding said multiplexed content with a second code to provide a set of frames, wherein the encoding said multiplexed content comprises identifying a block of bits to be encoded and then coding the block of bits with the second code, the second code being encoded by an inner encoder.

2. The method as claimed in claim 1 wherein said encoding systematic bits in each of the plurality of buffers with the first code comprises:

encoding systematic bits in each of the plurality of buffers with a block code.

3. The method as claimed in claim 2 wherein said encoding systematic bits in each of the plurality of buffers with a block code comprises:

encoding systematic bits in each of the plurality of buffers with a Reed-Solomon code.

4. The method as claimed in claim 1 wherein said multiplexing content of the plurality of buffers comprises:

providing a block of bits successively from each of the plurality of buffers.

5. The method claimed in claim 4 wherein said providing the block of bits successively from each of the plurality of buffers comprises:

providing the block of bits comprising a row of each of the plurality of buffers.

6. The method claimed in claim 1 wherein said identifying the block of bits to be encoded comprises:

identifying the block of bits received from at least one of the plurality of buffers.

7. A method reducing decoding complexity, comprising:

decoding received frames by a first decoder;

de-multiplexing correctly decoded frame to a plurality of buffers, wherein the de-multiplexing comprises identifying a block of bits comprising the correctly decoded frame decoded by the first decoder and belonging to at least one of the plurality of buffers, and further providing the block of bits to at least one of the plurality of buffers;

processing content of each of the plurality of buffers into a bit stream; and

providing indication of an erasure to a second decoder communicatively coupled to at least one of the plurality of buffers that would receive the correctly decoded frame if the frame failed to decode correctly.

8. The method as claimed in claim 7 wherein said processing content of each of the plurality of buffers comprises:

providing systematic portion of each of the plurality of buffers to higher layers.

9. The method as claimed in claim 7 wherein said processing content of each of the plurality of buffers comprises:

decoding the systematic portion of the buffer by the second decoder when the systematic portion is recoverable; and

providing the systematic portion of each of the plurality of buffer to higher layers.

10. A method for reducing decoding complexity, comprising:

encoding systematic bits of a bit stream in each of a plurality of transmit buffers with a first code, the first code being an outer code;

multiplexing content of the plurality of transmit buffers from the bit stream;

encoding said multiplexed content with a second code to provide a set of frames wherein said encoding said multiplexed content comprises identifying a block of bits to be encoded then coding the block of bits with the second code, the second code being an inner code;

transmitting the set of frames;

decoding received frames by a first decoder;

de-multiplexing correctly decoded frame to a plurality of receive buffers; and

processing content of each received buffer.

11. The method as claimed in claim 10 wherein said encoding systematic bits in each of the plurality of transmit buffers with the first code comprises:

encoding systematic bits in each of the plurality of transmit buffers with a block code.

12. The method as claimed in claim 11 wherein said encoding systematic bits in each of the plurality of buffers with the block code comprises:

encoding systematic bits in each of a plurality of buffers with a Reed-Solomon code.

13. The method as claimed in claim 10 wherein said multiplexing content of the plurality of the transmit buffers comprises:

providing a block, of bits successively from each buffer.

14. The method claimed in claim 13 wherein said providing the block of bits successively from each buffer comprises:

providing the block of bits comprising a row of at least one of the plurality of transmitting buffets.

15. The method claimed in claim 10 wherein said identifying the block of bits to be encoded comprises:

identifying the block of bits as the block of bits received from at least one of the plurality of transmit buffers.

16. The method as claimed in claim 10 wherein said de-multiplexing correctly decoded frame to a receive buffers comprises:

identifying a block of bits belonging to at least one of the plurality of receive buffers; and

providing the block of bits to at least one of the plurality of receive buffers.

17. The method as claimed in claim 16 wherein said identifying the block of bits belonging to at least one of the plurality of receive buffers, comprises:

identifying the block of bits as a block of bits comprising a frame decoded by the first decoder.

18. The method as claimed in claim 10 wherein said processing content of each receive buffer comprises:

providing systematic portion of each buffer to higher layers.

19. The method as claimed in claim 10 further comprising:

providing indication of an erasure to a second decoder communicatively coupled to the receive buffer that would receive the correctly decoded frame if the frame failed to decode correctly.

20. The method as claimed in claim 19 wherein said processing content of each buffer comprises:

decoding the systematic portion of at least one of the plurality of receive buffers by the first decoder when the systematic portion is recoverable; and

providing systematic portion of each buffer to higher layers.

21. An apparatus for reducing decoding complexity, comprising:

a plurality of buffers;

a plurality of outer encoders, each of said plurality of encoders directly coupled to one of said plurality of buffers wherein said plurality of buffers are configured to receive systematic bits from a bit stream;

a multiplexer directly coupled to said plurality of buffers; and

an inner encoder directly coupled to said multiplexer, wherein the inner encoder is configured to identify a block of bits encoded by the outer encoders and encode the block of bits with an inner code.

22. The apparatus as claimed in claim 21 wherein each of said plurality of buffers is configured to:

store systematic bits and parity bits.

23. The apparatus as claimed in claim 21 wherein each of said plurality of encoders is configured to:

encode systematic bits to provide parity bits.

24. The apparatus as claimed in claim 21 wherein each of said plurality of encoders is configured to:

encode the systematic bits with a block code.

25. The apparatus as claimed in claim 21 wherein each of said plurality of encoders is configured to:

encode the systematic bits with a Reed-Solomon code.

26. The apparatus claimed in claim 21 wherein said multiplexer is configured to:

provide a block of bits successively from each of said plurality of buffers to said inner encoder.

27. The apparatus as claimed in claim 26 wherein said block of bits comprises a row of said buffer.

28. The apparatus as claimed in claim 21 wherein said block of bits to be encoded comprises:

a block of bits received from said multiplexer.

29. An apparatus for reducing decoding complexity, comprising:

a first decoder, wherein said first decoder is configured to;

decode a received frame;

provide a correctly decoded frame; and

provide indication of an erasure if the received frame failed to decode correctly;

a de-multiplexer communicatively coupled to said first decoder;

a plurality of buffers communicatively coupled to said de-multiplexer; and

a plurality of decoders, each of said plurality of decoders being communicatively coupled to one of said plurality of buffers each being communicatively coupled to form a bit stream.

30. The apparatus as claimed in claim 29 wherein said de-multiplexer is configured to:

identify a block of bits belonging to at least one of the plurality of buffers; and

provide the block of bits to the buffer.

31. The apparatus as claimed in claim 30 wherein said block of bits belonging to at least one of the plurality of buffers comprises:

the block of bits comprising a frame decoded by said first decoder.

32. The apparatus as claimed in claim 29 wherein each of said plurality of decoders is configured to:

decode the systematic portion of at least one of the plurality of buffers by an outer decoder when the systematic portion is recoverable.

33. The apparatus as claimed in claim 29 wherein each of said plurality of buffers is configured to:

provide systematic portion to higher layers.

34. An apparatus for reducing decoding complexity, comprising:

a plurality of transmit buffers;

a plurality of outer encoders, each of said plurality of encoders being communicatively coupled to one of said plurality of transmit buffers wherein said plurality of transmit buffers are configured to receive systematic bits from a bit stream;

a multiplexer communicatively coupled to said plurality of transmit buffers;

an inner encoder communicatively coupled to said multiplexer, wherein the inner encoder is configured to identify a block of bits to be encoded and to encode the block of bits with an inner code;

a first decoder;

a de-multiplexer communicatively coupled to said first decoder;

a plurality of receive buffers communicatively coupled to said de-multiplexer; and

a plurality of decoders, each of said plurality of decoders being communicatively coupled to one of said plurality of receive buffers.

35. The apparatus as claimed in claim 34 wherein each of said plurality of transmit buffers is configured to:

store systematic bits and parity bits.

36. The apparatus as claimed in claim 34 wherein each of said plurality of encoders is configured to:

encode systematic bits to provide parity bits.

37. The apparatus as claimed in claim 36 wherein each of said plurality of encoders is configured to:

encode the systematic bits with a block code.

38. The apparatus as claimed in claim 34 wherein each of said plurality of encoders is configured to:

encode the systematic bits with a Reed-Solomon code.

39. The apparatus claimed in claim 34 wherein said multiplexer is configured to:

provide a block of bits successively from each of said plurality of transmit buffers to said inner encoder.

40. The apparatus as claimed in claim 39 wherein said block of bits comprises a row of at least one of the plurality of transmit buffers.

41. The apparatus as claimed in claim 34 wherein the block of bits to be encoded comprises:

the block of bits received from said multiplexer.

42. The apparatus as claimed in claim 34 wherein said first decoder is configured to:

decode a received frame;

provide a correctly decoded frame; and

provide indication of an erasure if the received frame failed to decode correctly.

43. The apparatus as claimed in claim 34 wherein said de-multiplexer is configured to:

identify a block of bits belonging to at least one of the plurality of receive buffers; and

provide the block of bits to the buffer.

44. The apparatus as claimed in claim 43 wherein said block of bits belonging to the buffer comprises:

the block of bits comprising a frame decoded by said first decoder.

45. The apparatus as claimed in claim 34 wherein each of said plurality of decoders is configured to:

decode the systematic portion of at least one of the plurality of receive buffers by an outer decoder when the systematic portion is recoverable.

46. The apparatus as claimed in claim 34 wherein each of said plurality of buffers is configured to:

provide systematic portion of at least one of the plurality of receive buffers to higher layers.