Electromagnetic shield formation for integrated circuit die package

• US 7,651,889 B2
• Filed: 12/20/2007
• Issued: 01/26/2010
• Est. Priority Date: 09/13/2007
• Status: Expired due to Fees

• Current Assignee: North Star Innovations Inc. (Wi-LAN Inc.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Burch, Kenneth R., Booth, Robert E., Lin, Jong-Kai, Tang, Jinbang, Mangrum, Marc A., Herr, Lawrence N., Frear, Darrel
• Primary Examiner(s): Dang, Phuc T
• Application Number:
  US11/961,827
• Publication Number:
  US 20090075428A1
• Time in Patent Office: 768 Days
• Field of Search: 438/68, 438/113, 438/114, 438/458, 438/460, 438/465, 257/620, 257/E21.596, 257/E21.599
• US Class Current: 438/114
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68345 used as a support during the manufacture of self supporting substrates
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device antennas per se H01Q
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/92 Specific sequence of method steps
• CPC Class Codes: H01L 2224/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15174 : in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is formed on one side of the encapsulated structure.

Claims

1. A method of packaging a plurality of semiconductor die, the method comprising:

forming an encapsulated structure including the plurality of semiconductor die, the encapsulated structure including the encapsulating material, the encapsulated structure having a first major surface and a second major surface;

forming a first dielectric layer overlying the first major surface of the encapsulated structure;

forming a plurality of openings in the first dielectric layer;

forming a plurality of conductive structures for electrically coupling to conductive structures of each of the semiconductor die through the plurality of openings;

providing a shielding layer, the second major surface of the encapsulated structure is located between the first major surface of the encapsulated structure and the shielding layer;

forming a first shielding structure for providing electromagnetic shielding for at least one of the plurality of semiconductor die, wherein the forming the first shielding structure includes forming at least one conductive structure, wherein the forming the at least one conductive structure includes;

forming at least one opening in the encapsulated structure, the at least one opening extending at least partially through the encapsulated structure from at least one of the first major surface or the second major surface of the encapsulated structure, and

forming conductive material in the at least one opening to form at least one conductive structure, the shielding layer is electrically coupled to the at least one conductive structure.

2. The method of claim 1 further comprising:

providing a second shielding layer, the first dielectric layer located between the first major surface of the encapsulated structure and the second shielding layer, wherein the shielding layer is electrically coupled to the second shielding layer through the at least one conductive structure.

3. The method of claim 1 wherein the at least one opening extends through the encapsulated structure from the first major surface of the encapsulated structure to the second major surface of the encapsulated structure.

4. The method of claim 1 wherein the forming an encapsulating structure further comprises forming an encapsulating layer over at least one side of a ground plane, wherein the at least one opening in the encapsulated structure extends from the second major surface of the encapsulating structure to the ground plane and the shielding layer is electrically coupled to the ground plane.

5. The method of claim 1 comprising:

forming a second shielding structure for providing electromagnetic shielding for at least another of the plurality of semiconductor die, wherein the forming the second shielding structure includes forming at least one conductive second structure, wherein the forming the at least one conductive second structure includes;

forming at least one second opening in the encapsulated structure, the at least one second opening extending at least partially through the encapsulated structure from at least one of the first major surface or the second major surface of the encapsulated structure, and

forming conductive material in the at least one second opening to form at least one second conductive structure, wherein the shielding layer is electrically coupled to the at least one second conductive structure.

6. The method of claim 5 further comprising:

forming a second dielectric layer overlying the first dielectric layer,

forming a first plurality of conductive vias, a second plurality of conductive vias, a third plurality of conductive vias, and a fourth plurality of conductive vias in the second dielectric layer, wherein the first shielding structure includes the first plurality of conductive vias, wherein the second shielding structure includes the second plurality of conductive vias, the third plurality of conductive vias is electrically coupled to conductive structures of the one semiconductor die and the fourth plurality of conductive vias is electrically coupled to the conductive structures of the another semiconductor die.

7. The method of claim 5 further comprising:

singulating the encapsulated structure wherein the singulating the encapsulated structure includes separating the first shielding structure and the at least one semiconductor die from the second shielding structure and the at least another semiconductor die.

8. The method of claim 1, wherein:

the first shielding structure is a Faraday shield formed to substantially reflect radio waves of a particular frequency range.

9. The method of claim 1 wherein the encapsulating layer includes a portion located between a major surface of the one semiconductor die the second major surface of the encapsulating structure.

10. The method of claim 2 wherein the at least one opening extends through the encapsulated structure from the first major surface of the encapsulated structure to the second major surface of the encapsulated structure.

11. The method of claim 4 comprising:

forming a second shielding structure for providing electromagnetic shielding for at least another of the plurality of semiconductor die, wherein the forming the second shielding structure includes forming at least one conductive second structure, wherein the forming the at least one conductive second structure includes;

forming at least one second opening in the encapsulated structure, the at least one second opening extending at least partially through the encapsulated structure from the second major surface of the encapsulated structure to the ground plane, and

forming conductive material in the at least one second opening to form at least one second conductive structure, wherein the shielding layer is electrically coupled to the at least one second conductive structure.

12. The method of claim 11 further comprising:

forming a second dielectric layer overlying the first dielectric layer,

forming a first plurality of conductive vias, a second plurality of conductive vias, a third plurality of conductive vias, and a fourth plurality of conductive vias in the second dielectric layer, wherein the first shielding structure includes the first plurality of conductive vias, wherein the second shielding structure includes the second plurality of conductive vias, the third plurality of conductive vias is electrically coupled to conductive structures of the one semiconductor die and the fourth plurality of conductive vias is electrically coupled to the conductive structures of the another semiconductor die.

13. The method of claim 11 further comprising:

singulating the encapsulated structure wherein the singulating the encapsulated structure includes separating the first shielding structure and the at least one semiconductor die from the second shielding structure and the at least another semiconductor die.

14. The method of claim 2 wherein:

the first shielding structure is a Faraday shield formed to substantially reflect radio waves of a particular frequency range.

15. The method of claim 3 wherein:

the first shielding structure is a Faraday shield formed to substantially reflect radio waves of a particular frequency range.

16. The method of claim 4 wherein:

the first shielding structure is a Faraday shield formed to substantially reflect radio waves of a particular frequency range.

17. The method of claim 5 wherein:

the first shielding structure is a Faraday shield formed to substantially reflect radio waves of a particular frequency range.

18. The method of claim 6 wherein:

the first shielding structure is a Faraday shield formed to substantially reflect radio waves of a particular frequency range.

19. The method of claim 7 wherein:

the first shielding structure is a Faraday shield formed to substantially reflect radio waves of a particular frequency range.

20. The method of claim 11 wherein:

the first shielding structure is a Faraday shield formed to substantially reflect radio waves of a particular frequency range.