Grouping processors and assigning shared memory space to a group in a heterogeneous computer environment

• US 7,653,908 B2
• Filed: 03/04/2008
• Issued: 01/26/2010
• Est. Priority Date: 09/25/2003
• Status: Active Grant

• Current Assignee: Tahoe Research Limited (f/k/a Learndale Limited) (Vector Capital Corporation)
• Original Assignee: International Business Machines Corporation
• Inventors: AGUILAR, JR., MAXIMINO, Nutter, Mark Richard, Day, Michael Norman, Xenidis, James
• Primary Examiner(s): An, Meng-Ai
• Assistant Examiner(s): Kawsar, Abdullah Al
• Application Number:
  US12/042,254
• Publication Number:
  US 20080155203A1
• Time in Patent Office: 693 Days
• Field of Search: 718/1, 718/100, 718/101, 718/102, 718/103, 718/104, 718/105, 711/118, 711/121, 711/130, 711/147, 711/148, 711/151, 711/52
• US Class Current: 718/104
• CPC Class Codes: G06F 2209/5012 Processor sets
• CPC Class Codes: G06F 9/5061 Partitioning or combining of resources

Abstract

Grouping processors is presented. A processing unit (PU) initiates an application and identifies the application'"'"'s requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application'"'"'s execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.

Claims

1. An information handling system comprising:

a plurality of dissimilar processors;

a memory accessible by the plurality of dissimilar processors;

one or more nonvolatile storage devices accessible by the plurality of dissimilar processors; and

a tool for processing an application that includes a plurality of application execution threads, the tool comprising software code effective to;

receive a resource request from the application that is running a first application execution thread on a first processor type, the first processor type included in the plurality of dissimilar processors;

assign one or more second processor types included in the plurality of dissimilar processor types and a memory space included in the memory to a group in response to the resource request, wherein the first processor type shares the memory space with the assigned second processor types, and wherein the first processor and the assigned second processor types are heterogeneous;

execute a second application execution thread on at least one of the second processor types assigned to the group;

identify whether the application requests the memory space to be a private memory, wherein the private memory is accessible only by the assigned second processor types; and

classify the memory space as the private memory in response to the identification of the memory space as the private memory.

2. The information handling system as described in claim 1 wherein the software code is further effective to:

retrieve data from the private memory using one of the assigned second processor types;

manipulate the data using one of the assigned second processor types whereby the data manipulation results in resultant data; and

store the resultant data in a shared memory included in the memory, the shared memory accessible by the first processor type.

3. The information handling system as described in claim 1 wherein the software code is further effective to:

retrieve an affinity selection bit from the application;

determine whether the application requests affinity processor selection based upon the affinity selection bit; and

perform the assigning using affinity processor selection.

4. The information handling system as described in claim 3 wherein the software code is further effective to:

select one of the second processor types based upon the affinity processor selection;

determine whether the selected second processor type is available; and

perform the assigning based upon the selected second processor type'"'"'s availability.

5. The information handling system as described in claim 1 wherein the software code is further effective to:

detect that one or more of the second processor types are in use by an active execution thread;

identify an active priority that corresponds to the active execution thread;

compare the active priority to a requesting priority, the requesting priority corresponding to the application execution thread; and

terminate the active execution thread if the active priority is lower than the requesting priority.

6. The information handling system as described in claim 1 wherein the group corresponds to one or more group properties, wherein the group properties are selected from the group consisting of a sharing mode, a priority, and a scheduling policy.

7. The information handling system as described in claim 1 wherein the group includes a plurality of second processors.

8. The information handling system as described in claim 1 wherein the first processor type is a processing unit and wherein the second processor types are synergistic processing units.

9. A computer program product stored on a computer storage media, the computer program product including a set of instructions that, when executed by an information handling system, causes the information handling system to perform steps comprising:

receiving a resource request from an application that is running a first application execution thread on a first processor type;

assigning one or more second processor types and a memory space to a group in response to the resource request, wherein the first processor type shares the memory space with the assigned second processor types, and wherein the first processor and the assigned second processor types are heterogeneous;

executing a second application execution thread on at least one of the second processor types assigned to the group;

identifying whether the application requests the memory space to be a private memory, wherein the private memory is accessible only by the assigned second processor types; and

classifying the memory space as the private memory in response to the identification of the memory space as the private memory.

10. The computer program product as described in claim 9 wherein the set of instructions, when executed by the information handling system, cause the information handling system to perform further steps comprising:

retrieving data from the private memory using one of the assigned second processor types;

manipulating the data using one of the assigned second processor types, the manipulating resulting in resultant data; and

storing the resultant data in a shared memory, the shared memory accessible by the first processor type.

11. The computer program product as described in claim 9 wherein the set of instructions, when executed by the information handling system, cause the information handling system to perform further steps comprising:

retrieving an affinity selection bit from the application;

determining whether the application requests affinity processor selection based upon the affinity selection bit; and

performing the assigning using affinity processor selection.

12. The computer program product as described in claim 11 wherein the performing further includes steps comprising:

selecting one of the second processor types based upon the affinity processor selection;

determining whether the selected second processor type is available; and

performing the assigning based upon the selected second processor type'"'"'s availability.

13. The computer program product as described in claim 9 wherein the set of instructions, when executed by the information handling system, cause the information handling system to perform further steps comprising:

detecting that one or more of the second processor types are in use by an active execution thread;

identifying an active priority that corresponds to the active execution thread;

comparing the active priority to a requesting priority, the requesting priority corresponding to the application execution thread; and

terminating the active execution thread if the active priority is lower than the requesting priority.

14. The computer program product as described in claim 9 wherein the group corresponds to one or more group properties, wherein the group properties are selected from the group consisting of a sharing mode, a priority, and a scheduling policy.

15. The computer program product as described in claim 9 wherein the group includes a plurality of second processors.

16. The computer program product as described in claim 9 wherein the first processor type is a processing unit and wherein the second processor types are synergistic processing units.