Liquid crystal display and method of manufacturing the same

• US 7,656,465 B2
• Filed: 10/14/2005
• Issued: 02/02/2010
• Est. Priority Date: 09/07/2001
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Misaki, Katsunori, Ikeda, Masahiro, Sasaki, Takahiro, Kondo, Naoto, Tsuda, Hideaki, Ueda, Kazuya, Takeda, Arihiro, Kataoka, Shingo, Nakamura, Kimiaki, Komorita, Akira
• Primary Examiner(s): Nguyen; Dung
• Assistant Examiner(s): DUONG, TAI V
• Application Number:
  US11/250,879
• Publication Number:
  US 20060097970A1
• Time in Patent Office: 1,572 Days
• Field of Search: 349/33, 349/38, 349/39, 349/85, 349/123, 349/128, 349/129, 349/130, 349/138, 349/139, 349/143, 349/144, 349/178, 349/155, 345/89
• US Class Current: 349/38
• CPC Class Codes: G02F 1/133707 Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
• CPC Class Codes: G02F 1/133757 with different alignment orientations
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/1393 the birefringence of the liquid crystal being electrically controlled, e.g. ECB-, DAP-, HAN-, PI-LC cells G02F1/1396, G02F1/141 take precedence
• CPC Class Codes: G02F 2203/30 Gray scale

Abstract

Fine electrode patterns pattern-formed in the shape of fine teeth of a comb bilaterally symmetrical with respect to band-shaped portions are formed at even intervals in a pixel electrode, and band-shaped dielectric layers are pattern-formed at even intervals to cover the fine electrode patterns in a display pixel. By the existence of the dielectric layer and the fine electrode patterns complementing this, a portion formed with this layer and the fine electrode patterns is a high threshold voltage region, and relatively, a low threshold voltage region where the dielectric layer does not exist is formed. By the aforementioned construction, it becomes possible to improve a delay in response speed at low gray levels and increase the speed of halftone response, whereby a very reliable image display having moving image performance almost equal to that of a CRT is realized.

Claims

1. A liquid crystal display comprising:

a pair of substrates having electrodes; and

a liquid crystal layer sandwiched between said substrates,

wherein a slit is formed in the electrode,

wherein regions with different threshold voltages are formed in each of display pixels,

wherein control for a desired gray level display characteristic is performed by adjusting the threshold voltages, and

wherein a bank-shaped projection made of an insulating material is formed on the electrode of the other substrate opposite the substrate having the electrode in which the slit is formed.

2. A liquid crystal display comprising:

a first substrate and a second substrate;

a liquid crystal layer sandwiched between the first substrate and the second substrate;

a first electrode formed on the first substrate;

a second electrode formed on the second substrate;

a third electrode formed over the second electrode;

a first bank-shaped projection made of an insulating material formed on the first electrode on the first substrate; and

at least two second bank-shaped projections made of an insulating material formed on the third electrode; and

a dielectric layer sandwiched between the second electrode and the third electrode at the at least two second bank-shaped projections.

3. The liquid crystal display according to claim 2, wherein, above the second substrate, a region having a predetermined capacitance by capacitive coupling is formed according to the presence or absence of the third electrode, and on a layer under the third electrode, the second electrode which capacitively couples with the third electrode is provided.

4. The liquid crystal display according to claim 2, wherein on the second substrate, the third electrode is provided in a portion corresponding to the region having a predetermined capacitance by capacitive coupling, and the second electrode which capacitively couples with the third electrode is provided on a layer under the third electrode.

5. The liquid crystal display according to claim 2, wherein the liquid crystal layer is composed of liquid crystals having negative dielectric constant anisotropy, liquid crystal molecules are aligned almost vertically when no voltage is applied, and the liquid crystal molecules are aligned almost horizontally when a predetermined voltage is applied.

6. The liquid crystal display according to claim 2, wherein a domain regulator for regulating the liquid crystal molecules so that liquid crystal molecules are aligned on a tilt in a plurality of tilting directions in each of the display pixels when a voltage lower than a predetermined voltage is applied is provided.

7. A method of manufacturing a liquid crystal display constructed by sandwiching a liquid crystal layer between a pair of substrates having electrodes, comprising the steps of:

forming a slit in the electrode;

forming regions with different threshold voltages in each of display pixels; and

performing control for a desired gray level display characteristic by adjusting the threshold voltages; and

forming a bank-shaped projection made of an insulating material on the electrode of the other substrate opposite the substrate having the electrode in which the slit is formed.