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Integrated circuit with embedded test functionality

  • US 7,657,807 B1
  • Filed: 06/27/2005
  • Issued: 02/02/2010
  • Est. Priority Date: 06/27/2005
  • Status: Active Grant
First Claim
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1. An integrated circuit, comprising:

  • a plurality of processor cores each configured to execute instructions; and

    a test access port configured to interface circuits included within the integrated circuit with a test environment external to the integrated circuit for testing of said circuits;

    wherein said test access port includes virtualization logic configured to allow a first set of instructions executing on a given one of said plurality of processor cores to control activity of said test access port for testing of said circuits.

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