Localized biasing for silicon on insulator structures
First Claim
Patent Images
1. A method of forming a silicon-on-insulator structure, comprising:
- providing a silicon-on-insulator substrate;
forming a recess in an insulator layer disposed on the silicon-on-insulator substrate;
depositing a conductor in the recess that is electrically isolated from the substrate; and
forming an active semiconductor device positioned directly over and having a body region in a direct abutting relationship with the conductor, wherein the semiconductor device is contiguous with the silicon-on-insulator substrate.
7 Assignments
0 Petitions
Accused Products
Abstract
A silicon-on-insulator device has a localized biasing structure formed in the insulator layer of the SOI. The localized biasing structure includes a patterned conductor that provides a biasing signal to distinct regions of the silicon layer of the SOI. The conductor is recessed into the insulator layer to provide a substantially planar interface with the silicon layer. The conductor is connected to a bias voltage source. In an embodiment, a plurality of conductor is provided that respectively connected to a plurality of voltage sources. Thus, different regions of the silicon layer are biased by different bias signals.
-
Citations
40 Claims
-
1. A method of forming a silicon-on-insulator structure, comprising:
-
providing a silicon-on-insulator substrate; forming a recess in an insulator layer disposed on the silicon-on-insulator substrate; depositing a conductor in the recess that is electrically isolated from the substrate; and forming an active semiconductor device positioned directly over and having a body region in a direct abutting relationship with the conductor, wherein the semiconductor device is contiguous with the silicon-on-insulator substrate. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A method, comprising:
-
providing a substrate; forming an insulator layer on the substrate; forming a plurality of mutually spaced-apart conductors in the insulator layer, wherein the conductors are individually configured to be coupled to a selected voltage potential and are electrically insulated from the substrate; forming a silicon layer abutting the insulator layer and the conductors; forming an active integrated circuit device having a body region in the silicon layer; and wherein forming the active integrated circuit device includes forming the body region positioned directly above and abutting a selected one of the conductors to provide electrical contact with the conductors. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
-
-
15. A method, comprising:
-
providing a substrate; forming an insulator layer on the substrate; depositing a patterned resist on the insulator layer; etching the insulator layer in areas of the insulator not covered by resist to form a plurality of mutually spaced-apart recesses; depositing conductors in the recesses, wherein the conductors are configured to be individually coupled to selected voltage potentials and are electrically insulated from the substrate; forming a silicon layer abutting the insulator layer and the conductor; forming an active integrated circuit device having a body region in the silicon layer; and wherein forming the integrated circuit device includes forming the body region positioned directly above and abutting a selected one of the conductors to provide electrical contact with the conductor. - View Dependent Claims (16, 17, 18, 19, 20)
-
-
21. A method of forming a silicon-on-insulator device, comprising:
-
providing a substrate; forming an insulator in contact with the substrate; patterning the insulator to form more than one conductive portion within the insulator, the conductive portions being mutually spaced-apart and configured to provide a local voltage bias, wherein the conductive portions are electrically insulated from the substrate; forming a silicon layer that abuts the insulator that contacts the insulator and the more than one conductive portion; and forming at least one active integrated circuit device in the silicon layer that is positioned directly vertically above and having a body region in a direct abutting relationship with at least one of the conductive portions. - View Dependent Claims (22, 23, 24, 25)
-
-
26. A method of forming a silicon-on-insulator semiconductor device, comprising:
-
providing a substrate; forming an insulator in contact with the substrate; forming a patterned conductor within the insulator defining a plurality of voltage biasing portions, wherein the patterned conductor is electrically insulated from the substrate; applying a silicon layer on the insulator that abuts the insulator and the patterned conductor; forming at least one active integrated circuit device in the silicon layer positioned directly vertically above and having a body region in a direct abutting relationship with one of the plurality of voltage biasing portions; and coupling a discharge circuit to the at least one integrated circuit device. - View Dependent Claims (27, 28, 29, 30, 31, 32)
-
-
33. A method of fabricating a silicon-on-insulator structure, comprising:
-
providing a substrate; forming at least one active integrated circuit device on the substrate; forming an insulator layer abutting the substrate; providing at least one recess in the insulator layer and depositing a conductive material in the at least one recess to define at least one voltage biasing portion; depositing a layer of a semiconductor material on the insulator layer and the at least one voltage biasing portion, wherein the at least one voltage biasing portion is electrically insulated from the substrate; forming at least one active integrated circuit device positioned directly vertically above and having a body region in a direct abutting relationship with the voltage biasing portion; and forming a discharge device coupled to the at least one integrated circuit device. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40)
-
Specification