Power semiconductor device with current sense capability

• US 7,659,577 B2
• Filed: 06/29/2006
• Issued: 02/09/2010
• Est. Priority Date: 07/01/2005
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Thiery, Vincent
• Primary Examiner(s): Parker; Kenneth
• Assistant Examiner(s): Diaz; Jose R
• Application Number:
  US11/477,691
• Publication Number:
  US 20070018196A1
• Time in Patent Office: 1,321 Days
• Field of Search: 257/328, 257/585, 257/593
• US Class Current: 257/335
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0865 Disposition
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7815 with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A power semiconductor device includes a power device and a current sense device formed in a common semiconductor region.

Claims

1. A power semiconductor device comprising:

a power device formed in a semiconductor region of one conductivity;

a current sense device formed in said semiconductor region, said current sense device including,

a plurality of active cells each including a base region of another conductivity formed in said semiconductor region, and a conductive region of said one conductivity formed in each said base region spaced from said semiconductor region of said one conductivity by an invertible region of said another conductivity;

a transistor gate adjacent said invertible region;

a plurality inactive cells of said another conductivity disposed at the outer boundary of said active region; and

a first power electrode in electrical contact with said conductive region of said one conductivity;

wherein said transistor gate extends over at least a portion of a respective inactive cell, said transistor gate including a gate electrode which is shorted to said first power electrode, wherein said active cells are a plurality of spaced stripes arranged in a row and said inactive cells include a first stripe shaped region of said another conductivity adjacent a first one of said active cells and a second stripe shaped region adjacent a last one of said active cells.

2. The power semiconductor device of claim 1, wherein said power device is a MOSFET.

3. The power semiconductor device of claim 1, wherein said power device is an IGBT.

4. The power semiconductor device of claim 1, wherein a conductive region of said one conductivity are source regions.

5. The power semiconductor device of claim 1, wherein said transistor gate extends over at least a portion of a respective inactive cell, said transistor gate including a gate electrode having a conductivity as said inactive cell.

6. A power semiconductor device comprising:

a power device formed in a semiconductor region of one conductivity;

a current sense device formed in said semiconductor region, said current sense device including,

an active region having a plurality of active cells, each active cell including a base region of another conductivity formed in said semiconductor region, and a conductive region of said one conductivity formed in each said base region spaced from said semiconductor region of said one conductivity by an invertible region of said another conductivity;

a transistor gate adjacent said invertible region; and

a plurality of inactive cells of said another conductivity disposed at the outer boundary of said active region;

wherein said active cells are a plurality of spaced stripes arranged in a row and said inactive cells include a first stripe shaped region of said another conductivity adjacent a first one of said active cells and a second stripe shaped region adjacent a last one of said active cells.

7. The power semiconductor device of claim 6, wherein said power device is a MOSFET.

8. The power semiconductor device of claim 6, wherein said power device is an IGBT.

9. The power semiconductor device of claim 6, wherein said invertible region is horizontally oriented.

10. The power semiconductor device of claim 6, wherein said conductive region of said one conductivity is a source region.

11. The power semiconductor device of claim 6, further comprising a semiconductor substrate of said one conductivity, said semiconductor region being disposed on said semiconductor substrate and further comprising a second power electrode in electrical contact with said substrate.

12. The power semiconductor device of claim 11, wherein said first power electrode is a source sense electrode and said second power electrode is a drain electrode of said power device and said current sense device.

13. The power semiconductor device of claim 6, wherein said semiconductor region serves as a common conduction region for said power device and said current sense device.

14. The power semiconductor device of claim 6, wherein said transistor gate extends over at least a portion of a respective inactive cell, said transistor gate including a gate electrode having a same conductivity as said inactive cell.

15. The power semiconductor device of claim 6, wherein at least one of said inactive cells is shorted to an active cell through a region of said another conductivity.

16. A power semiconductor device comprising:

a power device formed in a semiconductor region of one conductivity;

a current sense device including an active region having a plurality of active cells, each active cell including a base region of an opposite conductivity formed in said semiconductor region, and a conductive region of said one conductivity formed in each said base region spaced apart by an invertible region of said opposite conductivity;

a transistor gate adjacent said invertible region; and

a plurality of inactive cells of said opposite conductivity disposed in said active region;

wherein said active cells are a plurality of spaced stripes arranged in a row and said inactive cells include a first stripe shaped region of said opposite conductivity.

17. The power semiconductor device of claim 16, wherein said power device is a MOSFET.

18. The power semiconductor device of claim 16, wherein said power device is an IGBT.

19. The power semiconductor device of claim 16, wherein said invertible region is horizontally oriented.

20. The power semiconductor device of claim 16, wherein said conductive region of said one conductivity is a source region.