Multi-execution resource graphics processor

• US 7,659,898 B2
• Filed: 08/08/2005
• Issued: 02/09/2010
• Est. Priority Date: 08/08/2005
• Status: Active Grant

• Current Assignee: VIA Technologies Incorporated (VIA Technologies)
• Original Assignee: VIA Technologies Incorporated (VIA Technologies)
• Inventors: Prokopenko, Boris, Paltashev, Timour
• Primary Examiner(s): RICHER, JONI
• Application Number:
  US11/199,357
• Publication Number:
  US 20070030278A1
• Time in Patent Office: 1,646 Days
• Field of Search: 345/501, 345/502, 345/504, 345/505, 345/506, 345/530, 345/541, 345/557, 711/118, 711/130, 711/147, 712/10, 712/11, 712/28, 712/31, 718/102
• US Class Current: 345/505
• CPC Class Codes: G06F 9/5044 considering hardware capabilities

Abstract

A dynamically scheduled parallel graphics processor comprises a spreader that creates graphic objects for processing and assigns and distributes the created objects for processing to one or more execution blocks. Each execution block is coupled to the spreader and receives an assignment for processing a graphics object. The execution block pushes the object through each processing stage by scheduling the processing of the graphics object and executing instruction operations on the graphics object. The dynamically scheduled parallel graphics processor includes one or more fixed function units coupled to the spreader that are configured to execute one or more predetermined operations on a graphics object. An input/output unit is coupled to the spreader, the one or more fixed function units, and the plurality of execution blocks and is configured to provide access to memory external to the dynamically scheduled parallel graphics processor.

Claims

1. A dynamically scheduled parallel graphics processor, the processor having an object-oriented architecture, the processor comprising:

a global spreader configured to create multiple types of graphics object entities to be processed and to assign and distribute the created graphics object entities for processing;

a plurality of nonspecialized execution blocks coupled to the global spreader and configured to receive an assignment for processing multiple types of graphics object entities from the global spreader and to push the graphics object entities through one or more stages of processing,

wherein each nonspecialized execution block dynamically schedules processing of the assigned graphics object entities, makes information about an assigned graphics object entity available to one or more other nonspecialized execution blocks, and executes one or more instruction operations on the assigned graphics object entity; and

a descriptor table configured to provide a registry of graphics object entities being processed by the nonspecialized execution block, wherein a special control bit in the descriptor table configures the plurality of nonspecialized execution blocks to process the assigned graphics object entity sequentially.

2. The processor of claim 1, wherein the global spreader allocates graphics object entities associated with a triangle graphics object entity to a nonspecialized execution block also assigned to process the triangle graphics object entity.

3. The processor of claim 1, further comprising:

logic in the global spreader configured to maintain and update at each clock cycle for each nonspecialized execution block the amount of available resources, the entities being processed, physical buffer data for each entity, and available cache memory.

4. The processor of claim 1, further comprising:

logic in the global spreader configured to prioritize each nonspecialized execution block of the plurality of nonspecialized execution blocks for being assigned a particular graphics object entity.

5. The processor of claim 1, further comprising:

logic executable by the global spreader configured to establish and maintain data layout preferences for triangle graphic object entities in association with corresponding vertices and pixels.

6. The processor of claim 1, wherein each of the plurality of nonspecialized execution blocks comprises:

a stage parser containing descriptor table pointers configured to point to a graphics object entity to be moved or processed;

a thread controller configured to manage execution of floating point and integer instructions; and

a data move machine configured to load and move graphics object entities in the nonspecialized execution block and further configured to communicate with the global spreader and other nonspecialized execution blocks.

7. The processor of claim 6, further comprising:

a rename logic table configured to provide flexible address mapping of physical buffers in a cache memory.

8. The processor of claim 6, wherein the descriptor table contains information about data relation, allocation, readiness, and current stage in association with the processing of a graphics object entity.

9. The processor of claim 6, wherein the pointers contained in the stage parser table point to the graphics object entity to be processed on each stage of a logical graphics pipeline.

10. The processor of claim 9, wherein a process associated with a stage includes moving a graphics object data within the nonspecialized execution block, to another nonspecialized execution block, or to the fixed function unit.

11. The processor of claim 6, wherein the descriptor table is a content addressable memory.

12. The dynamically scheduled parallel graphics processor of claim 6, wherein the plurality of nonspecialized execution blocks is configured to use the descriptor table to process the assigned graphics object entities out of order.

13. The processor of claim 1, further comprising:

logic in the global spreader configured to maintain a primitive table containing primitive ID information when a triangle entity is allocated.

14. The processor of claim 13, wherein the primitive table has a primitive ID field and an nonspecialized execution block field corresponding to a particular nonspecialized execution block where a triangle entity is allocated.

15. The dynamically scheduled parallel graphics processor of claim 1, further comprising:

one or more fixed function units coupled to the global spreader and the plurality of nonspecialized execution blocks and configured to execute one or more predetermined operations on a graphics object entity; and

an input/output unit coupled to the global spreader, the one or more fixed function units, and the plurality of nonspecialized execution blocks configured to provide access to an external memory.

16. The processor of claim 15, wherein the one or more fixed function units perform rasterization, texturing, or outputting of pixel processing parts.

17. The dynamically scheduled parallel graphics processor of claim 1, wherein the assigned graphics object entity includes numerical data and control data, and wherein each nonspecialized execution block executes one or more programmable instruction operations according to the control data of the assigned graphics object entity.