Real time clock circuit having an internal clock generator

• US 7,661,008 B2
• Filed: 08/03/2005
• Issued: 02/09/2010
• Est. Priority Date: 05/13/2003
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Sutton, John M., Retter, Eric E.
• Primary Examiner(s): Lee; Thomas
• Assistant Examiner(s): TRAN, VINCENT HUY
• Application Number:
  US11/196,111
• Publication Number:
  US 20050265127A1
• Time in Patent Office: 1,651 Days
• Field of Search: 713/500, 713/501, 368/47, 375/354, 375/355
• US Class Current: 713/500
• CPC Class Codes: G04G 15/006 for operating at a number of different times cigar or cigarette receptacles or boxes with means for limiting the frequency of smoking A24F15/005
• CPC Class Codes: G04R 20/02 the radio signal being sent by a satellite, e.g. GPS

Abstract

Under the present invention a real time clock circuit, within a set-top box, is provided with an internal clock generator for generating multiple clock signals. Once generated, a first clock signal is divided into an initial set of values representing time and optionally day/date intervals, and then communicated to a set of clock registers. The initial set of values can then be communicated (directly or via a set of DCR registers) to a display component within the set-top box. Updated clock signals are received by the set of DCR registers from an external source such as a satellite or the like thus making the clock very accurate, and are communicated to the display component. Similar to the initial set of values, the updated set of values could be communicated to the display component directly from the set of DCR registers, or via the set of clock registers.

Claims

1. A real time clock circuit comprising an internal clock generator for generating a system clock signal that controls a device through a first signal at a first frequency, wherein the system clock signal is divided by a divider into an initial set of values, and wherein the initial set of values is communicated to a set of clock registers,

wherein a single clock generator that is the internal clock generator both controls the device and provides a real time clock input through a second signal at a second frequency different from the first frequency to the set of clock registers, wherein the real time clock circuit is embodied within a set-top box, and wherein the set-top box further comprises:

a dynamic control register (DCR) interface; and

a set of DCR registers

wherein the initial set of values is communicated from the set of clock registers to the set of DCR registers,

wherein the initial set of values is communicated from the set of DCR registers to a display component,

wherein the set of DCR registers receive an updated set of values from an external source, and

wherein the updated set of values is communicated directly from the set of DCR registers to the display component.

2. The real time clock circuit of claim 1, wherein the initial set of values is communicated directly from the set of clock registers to a display component.

3. The real time clock circuit of claim 1, wherein the external source is a satellite.

4. The real time clock circuit of claim 1, wherein the updated set of values is communicated from the set of DCR registers to the set of clock registers, and wherein the updated set of values is communicated from the set of clock registers to the display component.

5. The real time clock circuit of claim 1, wherein the initial set of values represent time intervals, and wherein the time intervals comprise hours, minutes and seconds.

6. A set-top box, comprising:

a real time clock circuit having an internal clock generator for generating a first signal at a first frequency and a second signal at a second frequency different from the first frequency, the second signal controlling the set-top box;

a divider for dividing the first clock signal into an initial set of values;

a set of clock registers for receiving the initial set of values from the divider;

a display component for receiving the initial set of values from the set of clock registers,

a device control register (DCR) interface having a set of DCR registers,

wherein the set of DCR registers receive an updated set of values from an external source,

wherein the updated set of values is communicated to the display component,

wherein the updated set of values is communicated directly to the display component from the set of DCR registers, and

wherein a single clock generator that is the internal clock generator both controls the device and provides a real time clock input to the set of clock registers.

7. The set-top box of claim 6, wherein the initial set of values is directly communicated from the set of clock registers to the display component.

8. The set-top box of claim 6, wherein the initial set of values is communicated from the set of clock registers to the set of DCR registers, and wherein the initial set of values is communicated from the set of DCR registers to the display component.

9. The set-top box of claim 6, wherein the external source is a satellite.

10. The set-top box of claim 6, wherein the updated set of values is communicated from the set of DCR registers to the set of clock registers, and wherein the updated set of values is communicated from the set of clock registers to display component.

11. A method for communicating a system clock signal to a display component within a set-top box, comprising:

providing a real time clock circuit having an internal clock generator;

generating a first clock signal at a first frequency and a second signal at a second frequency different from the first frequency with the internal clock generator;

dividing the first clock signal into an initial set of values;

communicating the initial set of values to a set of clock registers;

communicating the initial set of values from the set of clock registers to the display component;

receiving an updated set of values in a set of DCR registers within the set-top box; and

communicating the updated set of values to the display component,

wherein the step of communicating the updated set of values comprises directly communicating the updated set of values from the set of DCR registers to the display component,

wherein a single clock generator that is the internal clock generator both controls the set-top box through the second signal and provides a real time clock input to the set of clock registers.

12. The method of claim 11, wherein the step of communicating the initial set of values from the set of clock registers to the display component comprises directly communicating the initial set of values from the set of clock registers to the display component.

13. The method of claim 11, wherein the step of communicating the initial set of values from the set of clock registers to the display component comprises:

communicating the initial set of values from the set of clock registers to a set of DCR registers; and

communicating the initial set of values from the set of DCR registers to the display component.

14. The method of claim 11, wherein the step of communicating the updated set of values comprises:

communicating the updated set of values from the set of DCR registers to the set of clock registers; and

communicating the updated set of values from the set of clock registers to the display component.