Semiconductor device with a diffusion barrier film having a spacing for stress relief of solder bump

• US 7,663,201 B2
• Filed: 06/07/2006
• Issued: 02/16/2010
• Est. Priority Date: 06/10/2005
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: Yamada, Yukiko
• Primary Examiner(s): Landau; Matthew C
• Assistant Examiner(s): Mitchell; James M
• Application Number:
  US11/447,966
• Publication Number:
  US 20060278984A1
• Time in Patent Office: 1,350 Days
• Field of Search: None
• US Class Current: 257/459
• CPC Class Codes: H01L 2224/02123 inside the bonding area
• CPC Class Codes: H01L 2224/03 Manufacturing methods
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05557 comprising protrusions or indentations
• CPC Class Codes: H01L 2224/05576 being mutually engaged together, e.g. through inserts
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/12 Structure, shape, material or disposition of the bump connectors prior to the connecting process
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01028 Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/05042 : Si3N4
• CPC Class Codes: H01L 2924/351 : Thermal stress

Abstract

The present invention provides a semiconductor device exhibiting an improved reliability. A semiconductor device comprises a semiconductor chip having an electrode on a surface thereof and a mounting substrate, and the electrode (aluminum electrode) of the semiconductor chip is coupled to the mounting substrate through a bump (solder bump 104). A plurality of diffusion barrier films (UBM 112) for preventing a diffusion of a material composing the bump is provided between the electrode and the bump, and the diffusion barrier film is formed to have a plurality of divided portions via spacings therebetween.

Claims

1. A semiconductor device, comprising:

a semiconductor chip having an electrode coupled to a mounting substrate via a bump formed on a surface thereof;

a diffusion barrier film for preventing a diffusion of a material composing said bump provided on a surface of said electrode, said diffusion barrier film being formed to have a geometry including a spacing; and

a spacing film disposed in the spacing of said diffusion barrier film, said spacing film being an insulating film.

2. The semiconductor device according to claim 1, wherein said diffusion barrier film is formed to have a geometry, in which said diffusion barrier film is divided to be a plurality of portions, between which said spacing is disposed.

3. The semiconductor device according to claim 2, wherein plurality of said diffusion barrier films are configured to have a maximum length in radial direction from a center of said semiconductor chip to a circumference thereof, which is shorter than maximum length in a direction perpendicular to said radial direction.

4. The semiconductor device according to claim 1, wherein a slit, which is equivalent to said spacing, is formed in said diffusion barrier film.

5. The semiconductor device according to claim 1, wherein said spacing film is formed of a material that is capable of preventing a diffusion of the material composing said bump.

6. The semiconductor device according to claim 5, wherein said spacing film is formed of a material containing a main component of at least one selected from a group consisting of polyimide, SiO₂, SiON and SiN.

7. The semiconductor device according to claim 1, wherein the electrode of the semiconductor chip further comprises an aluminum electrode, and said mounting substrate and said semiconductor chip are electrically coupled to said bump via the aluminum electrode.