GPS front end having an interface with reduced data rate
First Claim
1. A radio frequency integrated circuit for a global positioning system (GPS) application, comprising:
- a mixer which down-converts received GPS signals to a predetermined intermediate frequency that is less than 4fo , where fo is 1.023 MHz, to produce intermediate frequency GPS signals;
an intermediate frequency filter which receives and filters the intermediate frequency GPS signals to produce filtered intermediate frequency GPS signals;
an automatic gain control circuit which amplifies the filtered intermediate frequency GPS signals to provide amplified, filtered intermediate frequency GPS signals;
an analog-to-digital converter which digitizes the amplified, filtered intermediate frequency GPS signals at a predetermined sampling rate to provide samples of a predetermined number of bits; and
an interface which provides the samples to a base band processor over a shared serial bus, wherein the radio frequency integrated circuit (RFIC) is configurable through the serial bus into;
a) an ON state wherein the RFIC controls the serial bus to provide the samples to the base band processor, and b) a STANDBY state wherein the RFIC does not control the serial bus, and wherein the base band processor is a general-purpose microprocessor.
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Accused Products
Abstract
A radio frequency integrated circuit for a global positioning system (GPS) application mixes radio frequency GPS signals from an external source with a predetermined intermediate frequency that is less than 4fo. In one embodiment, the intermediate frequency is selected to be 1.5fo. An intermediate frequency filter then band-limits the intermediate frequency GPS signals, rolling off at a frequency in the vicinity of 2.5 MHz to achieve substantial attenuation at 3.5-4.0 MHz. An automatic gain control circuit amplifies the filtered intermediate frequency GPS signals to proper voltage levels. The amplified intermediate frequency GPS signals is then digitized by an analog-to-digital converter at a predetermined sampling rate more than twice the intermediate frequency to provide samples of a predetermined number of bits, which are then provided for base band processing by a general purpose microprocessor over an industry-standard serial bus.
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Citations
21 Claims
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1. A radio frequency integrated circuit for a global positioning system (GPS) application, comprising:
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a mixer which down-converts received GPS signals to a predetermined intermediate frequency that is less than 4fo , where fo is 1.023 MHz, to produce intermediate frequency GPS signals; an intermediate frequency filter which receives and filters the intermediate frequency GPS signals to produce filtered intermediate frequency GPS signals; an automatic gain control circuit which amplifies the filtered intermediate frequency GPS signals to provide amplified, filtered intermediate frequency GPS signals; an analog-to-digital converter which digitizes the amplified, filtered intermediate frequency GPS signals at a predetermined sampling rate to provide samples of a predetermined number of bits; and an interface which provides the samples to a base band processor over a shared serial bus, wherein the radio frequency integrated circuit (RFIC) is configurable through the serial bus into;
a) an ON state wherein the RFIC controls the serial bus to provide the samples to the base band processor, and b) a STANDBY state wherein the RFIC does not control the serial bus, and wherein the base band processor is a general-purpose microprocessor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for interfacing a radio frequency integrated circuit for a global positioning system (GPS) application with a general purpose microprocessor, comprising:
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receiving radio frequency GPS signals from an external source; down-converting the GPS signals in a mixer to a predetermined intermediate frequency that is less than 4fo, where fo is 1.023 MHz, to produce intermediate frequency GPS signals; filtering the intermediate frequency GPS signals to produce filtered intermediate frequency GPS signals; providing an automatic gain control circuit which amplifies the filtered intermediate frequency GPS signals to produce amplified, filtered intermediate GPS signals; digitizing the amplified, filtered intermediate frequency GPS signals at a predetermined sampling rate to provide samples of a predetermined number of bits; and providing the samples to the general purpose microprocessor over a shared serial bus, wherein the radio frequency integrated circuit (RFIC) is configurable through the serial bus into;
a) an ON state wherein the RFIC controls the serial bus to provide the samples to the base band processor, and b) a STANDBY state wherein the RFIC does not control the serial bus. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21)
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Specification