Methods and systems for distributed cache tag management

• US 7,673,100 B1
• Filed: 07/10/2006
• Issued: 03/02/2010
• Est. Priority Date: 07/10/2006
• Status: Expired due to Fees

• Current Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Original Assignee: EMC Corporation (Dell Technologies Inc.)
• Inventors: Niver, Brett D., Chalmer, Steven R., McClure, Steven T.
• Primary Examiner(s): Bragdon; Reginald G
• Assistant Examiner(s): Vo; Thanh D
• Application Number:
  US11/482,912
• Time in Patent Office: 1,331 Days
• Field of Search: None
• US Class Current: 711/119
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 2212/283 Plural cache memories

Abstract

Methods and systems are disclosed that relate to locating cached data corresponding to data in persistent memory within a data storage facility. An exemplary method includes receiving a request for data in persistent memory, applying a function to a persistent memory address of the requested data to determine an address of one of a plurality of cache tag controllers, each of which controls nonduplicative cache tags, and looking up, at the addressed cache tag controller, a cache memory address for data corresponding to the requested data.

Claims

1. A method for locating cached data corresponding to data in persistent memory within a data storage facility, comprising:

receiving a request for data in persistent memory;

applying a function to a persistent memory address of the requested data to determine an address of one of a plurality of cache tag controllers, each of which controls nonduplicative cache tags; and

looking up, at the addressed cache tag controller, a cache memory address for data corresponding to the requested data, wherein at least some of the cache tag controllers contain cache tags for less than all of the cache memory.

2. The method of claim 1, wherein the function is a modulo two function.

3. The method of claim 1, wherein the result of applying the function corresponds to the address of one of the plurality of cache tag controllers.

4. The method of claim 3, further comprising:

using the result of the function to look up the address of one of the plurality of cache tag controllers.

5. The method of claim 1, further comprising:

accessing the data, corresponding to the requested data, at the cache memory address.

6. The method of claim 1, further comprising:

identifying the persistent memory address of the requested data.

7. The method of claim 1, further comprising:

looking up, at the addressed cache tag controller, the cache memory address for the data corresponding to the requested data by the persistent memory address.

8. The method of claim 1, further comprising:

wherein, no cache memory address is specified for data corresponding to the requested data at the addressed cache tag controller, copying the requested data into cache memory.

9. The method of claim 1, further comprising:

receiving a first request for data in persistent memory;

applying a function to a persistent memory address of the first requested data to determine an address of one of a plurality of cache tag controllers; and

looking up, at a first addressed cache tag controller, a first cache memory address for data corresponding to the first requested data;

receiving a second request for data in persistent memory;

applying a function to a persistent memory address of the second requested data to determine an address of one of a plurality of cache tag controllers, wherein the second requested data differs from the first requested data, wherein the first addressed cache tag controller controls different cache tags than the second addressed cache tag controller; and

looking up, at a second addressed cache tag controller, a second cache memory address for data corresponding to the second requested data.

10. A system for locating cached data corresponding to data in persistent memory within a data storage facility, the system comprising:

a processor;

a memory that includes a cache memory and includes a plurality of cache tag controllers, each of which contains non-duplicative cache tags; and

a computer-readable storage medium containing execute code that receives a request for data in persistent memory, applies a function to a persistent memory address of the requested data to determine an address of one of a plurality of cache tag controllers and looks up, at the addressed cache tag controller, a cache memory address for data corresponding to the requested data, wherein at least some of the cache tag controllers contain cache tags for less than all of the cache memory.

11. The system of claim 10, wherein the function is a modulo two function.

12. The system of claim 10, wherein the result of applying the function corresponds to the address of one of the plurality of cache tag controllers.

13. The system of claim 12, further comprising:

using the result of the function to look up the address of one of the plurality of cache tag controllers.

14. The system of claim 10, further comprising:

accessing the data, corresponding to the requested data, at the cache memory address.

15. The system of claim 10, further comprising:

identifying the persistent memory address of the requested data.

16. The system of claim 10, further comprising:

looking up, at the addressed cache tag controller, the cache memory address for the data corresponding to the requested data by the persistent memory address.

17. The system of claim 10, further comprising:

wherein, no cache memory address is specified for data corresponding to the requested data at the addressed cache tag controller, copying the requested data into cache memory.

18. The system of claim 10, further comprising:

receiving a first request for data in persistent memory;

applying a function to a persistent memory address of the first requested data to determine an address of one of a plurality of cache tag controllers; and

looking up, at a first addressed cache tag controller, a first cache memory address for data corresponding to the first requested data;

receiving a second request for data in persistent memory;

applying a function to a persistent memory address of the second requested data to determine an address of one of a plurality of cache tag controllers, wherein the second requested data differs from the first requested data, wherein the first addressed cache tag controller controls different cache tags than the second addressed cache tag controller; and

looking up, at a second addressed cache tag controller, a second cache memory address for data corresponding to the second requested data.