System and method of uncorrelated code hopping in a communications system

• US 7,673,192 B2
• Filed: 07/20/2006
• Issued: 03/02/2010
• Est. Priority Date: 07/20/2005
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Min, Jonathan S., Kolze, Thomas J., Currivan, Bruce J., Miller, Kevin L., Prodan, Richard S.
• Primary Examiner(s): Baker; Stephen M
• Application Number:
  US11/489,538
• Publication Number:
  US 20070061642A1
• Time in Patent Office: 1,321 Days
• Field of Search: 375/132, 714/701
• US Class Current: 714/701
• CPC Class Codes: H04B 1/69 Spread spectrum techniques
• CPC Class Codes: H04J 13/0074 Code shifting or hopping

Abstract

A system and method are used to provide uncorrelated code hopping in a communications system. A multi-bit linear shift register receives data and clocks the data fifteen times. A word assembler receives the shifted data and outputs a fifteen bit word. A mixer mixes the fifteen bit word with an numerical value of active codes to generate a mixed signal. A divider divides the mixed signal to produce a divided signal. A truncator truncates the divided signal to its seven most significant bits to produce a pseudo random hop number. A code matrix shifter circularly shifts the active codes in a code matrix based on the pseudo random hop number to produce a circularly shifted code. A transmitter transmits the circularly shifted code matrix.

Claims

1. A system, comprising:

a multi-bit linear shift register that receives data, the data being clocked multiple times;

a word assembler that receives the shifted data and outputs a fifteen bit word;

a mixer that mixes the fifteen bit word with a numerical value of active codes to generate a mixed signal;

a divider that divides the mixed signal to produce a divided signal;

a truncator that truncates the divided signal to its seven most significant bits to produce a pseudo random hop number;

a code matrix shifter that circularly shifts the active codes in a code matrix based on the pseudo random hop number to produce a circularly shifted code; and

a transmitter that transmits the circularly shifted code.

2. The system of claim 1, wherein the multi-bit linear shift register is configured to be clocked fifteen times to shift the data fifteen bits.

3. The system of claim 1, further comprising:

a node in a synchronous code-division multiple access communications system that comprises the multi-bit linear shift register, the word assembler, the mixer, the divider, the truncator, the code matrix, and the transmitter.

4. The system of claim 1, wherein the word assembler is configured to form each word as y15:

1=[s7;

1, s15;

8], such that s7;

1 are seven most significant bits and s15;

8 are eight least significant bits of the shifted data.

5. The system of claim 1, wherein the code matrix shifter is configured shift the active codes according to:

f(k,i)=active_code_list[modulo(2*Na-128-hop_number(k)+i, Na)],

wherein;

the code matrix elements ci,j are the elements of the code matrix,

k indicates a spreading interval,

i indicates a row in the code matrix,

Na is the numerical value of active codes,

active_code_list is a list of the active codes, in increasing order, with each element in a range 0 to 127,

u is a list of unused codes in the code matrix, in increasing order, with each element in a range 0 to 127,

hop_number is the pseudo random hop number, and

128-Na≦

i≦

127.

6. The system of claim 1, wherein the transmitter is configured to mix a symbol or a quadrature amplitude modulated symbol with respective rows of the code matrix before transmitting the code matrix.

7. The system of claim 1, wherein the multi-bit linear shift register is configured to hop by a power of 2 number of clock cycles in a binary hopping scheme.

8. The system of claim 1, wherein the multi-bit linear shift register is configured to be clocked one time to shift the data fifteen bits.

9. The system of claim 8, further comprising a feedback path across each cell of the fifteen-bit linear shift register.

10. A method, comprising:

clocking a shift register multiple times;

assembling a word based on the shifted data;

mixing the word with a numerical value of active codes to generate a mixed signal;

dividing the mixed signal to produce a divided signal;

truncating the divided signal to its seven most significant bits to produce a pseudo random hop number;

circularly shifting the active codes in a code matrix based on the pseudo random hop number to produce a circularly shifted code; and

transmitting the circularly shifted code.

11. The method of claim 10, wherein the shifting step occurs over fifteen clock cycles.

12. The method of claim 10, wherein the shifting step occurs over one clock cycle.

13. The method of claim 10, wherein each word is formed as y15:

1=[s7;

1, s15;

9], such that s7;

1 are seven most significant bits and s15;

9 are eight least significant bits of the shifted data.

14. The method of claim 10, wherein the circularly shifting of the active codes occurs according to:

f(k,i)=active_code_list[modulo(2*Na-129-hop_number(k)+i, Na)],

wherein;

the code matrix elements ci,j are the elements of the code matrix,

k indicates a spreading interval,

i indicates a row in the code matrix,

Na is the numerical value of active codes,

active_code_list is a list of the active codes, in increasing order, with each element in a range 0 to 127,

u is a list of unused codes in the code matrix, in increasing order, with each element in a range 0 to 127,

hop_number is the pseudo random hop number, and

129-Na≦

i≦

127.

15. The method of claim 10, wherein before the transmitting step a symbol or quadrature amplitude modulated symbol is mixed with respective rows of the circularly shifted code matrix.

16. The method of claim 10, wherein the shifting step comprises a binary hopping scheme.