Thin film transistor array panel for liquid crystal display

• US 7,675,062 B2
• Filed: 06/19/2006
• Issued: 03/09/2010
• Est. Priority Date: 09/30/1999
• Status: Expired due to Fees

• Current Assignee: TCL China Star Optoelectronics Technology Co. Ltd. (TCL Technology Group Corp.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kang, Jin-Kyu, Hong, Mun-Pyo, Hong, Wan-Shick, Rho, Soo-Guy, Kim, Sang-Il, Kim, Snag-Gab
• Primary Examiner(s): Weiss; Howard
• Application Number:
  US11/455,367
• Publication Number:
  US 20060231846A1
• Time in Patent Office: 1,359 Days
• Field of Search: 257/59, 257/89, 349/43, 349/106
• US Class Current: 257/59
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136222 Colour filters incorporated in the active matrix substrate
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT

Abstract

A black matrix having an opening at pixels of a matrix array in a display area, a common wire including common pads and common signal lines, and gate pads in a peripheral area, and an alignment key in outer area to align interlayer thin films are formed on an insulating substrate. Red, blue and green color filters the edge of which overlap the black matrix are formed at the pixels on the insulating substrate, and an organic insulating layer covering the black matrix and the color filters and having a contact hole exposing the gate pad is formed thereon. A gate wire including a gate line connected to the gate pad through the contact hole and a gate electrode connected to the gate line is formed on the organic insulating layer, and a gate insulating layer covering the gate wire is formed on the organic insulating layer. A semiconductor pattern and ohmic contact layers are sequentially formed on the gate insulating layer of the gate electrode. A data wire including a source electrode and a drain electrode that are made of a same layer on the ohmic contact layers and separated from each other, and a data line connected to the source electrode and defining the pixels of a matrix array by crossing the gate line is formed on the gate insulating layer. A passivation layer covering the data wire and having contact holes exposing the gate pad and the data pad is formed, and a pixel wire including a pixel electrode, a redundant gate pad, a redundant data pad that are respectively connected to the drain electrode, the gate pad and the data pad through the contact holes.

Claims

1. A thin film transistor array panel for a liquid crystal display comprising:

a substrate;

a color filter on the substrate;

a gate line formed on the substrate;

a data line formed on the substrate and insulated from the gate line;

a thin film transistor formed on the substrate and connected to the gate line and the data line;

a pixel electrode connected to the thin film transistor;

a black matrix on the substrate;

a common wire formed with the same layer as the black matrix and comprising a common signal line and a common pad connected to the common signal line,

wherein the color filter extends along the data line, and wherein the common pad transmits a common signal to the common signal line from an external circuit and the common signal line transmits the common signal to a common electrode opposing the pixel electrode.

2. The thin film transistor array panel of claim 1, wherein the black matrix has an opening on the pixel electrode.

3. The thin film transistor array panel of claim 2, further comprising an align key formed with the same layer as the black matrix or the color filter.

4. The thin film transistor array panel of claim 2, further comprising:

a gate pad that is connected to a first external circuit, receives a gate signal from the first external circuit, and transmits the gate signal to the gate line; and

a data pad that is connected to a second external circuit, receives a data signal from the second external circuit, and transmits the data signal to the data line,

wherein the gate pad or the data pad are formed with the same layer as the black matrix.

5. The thin film transistor array panel of claim 4, further comprising:

a redundant gate pad made of a same layer as the pixel electrode and connected to the gate pad; and

a redundant data pad made of a same layer as the pixel electrode and connected to the data pad.

6. The thin film transistor array panel of claim 5, further comprising:

a first insulator disposed between the black matrix and the gate line and having a contact hole to connect the gate pad to the gate line; and

a second insulator disposed between the black matrix and the data line and having a contact hole to connect the data pad to the data line.

7. The thin film transistor array panel of claim 2, wherein an edge of the color filter overlaps the black matrix.

8. The thin film transistor array panel of claim 2, further comprising an organic insulating layer disposed on the black matrix and the color filter and under the gate line, the data line, the thin film transistor, and the pixel electrode.