Multi-gate field effect transistor
First Claim
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1. A transistor structure comprising:
- a first semiconductor layer, wherein said first semiconductor layer comprises a first semiconductor, and wherein said first semiconductor layer has a substantially single-crystal crystal structure;
a first gate stack comprising a first gate dielectric layer and a first gate conductor layer, wherein said first gate dielectric layer comprises a first rare-earth metal, and wherein said first gate dielectric layer has a substantially single-phase crystal structure; and
a second gate stack comprising a second gate dielectric layer and a second gate conductor layer, wherein said second gate dielectric layer comprises a second rare-earth metal, and wherein said second gate dielectric layer has a substantially single-phase crystal structure;
wherein said first semiconductor layer interposes said first gate dielectric layer and said second gate dielectric layer, and wherein said first gate dielectric layer interposes said first semiconductor layer and said first gate conductor layer, and further wherein said second gate dielectric layer interposes said first semiconductor layer and said second gate conductor layer.
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Abstract
A planar, double-gate transistor structure comprising upper and lower gate stacks that each comprises a single-phase high-K dielectric gate dielectric is disclosed. The transistor structure is particularly suitable for fully-depleted silicon-on-insulator electronics having gate-lengths less than 65 nm.
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Citations
39 Claims
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1. A transistor structure comprising:
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a first semiconductor layer, wherein said first semiconductor layer comprises a first semiconductor, and wherein said first semiconductor layer has a substantially single-crystal crystal structure; a first gate stack comprising a first gate dielectric layer and a first gate conductor layer, wherein said first gate dielectric layer comprises a first rare-earth metal, and wherein said first gate dielectric layer has a substantially single-phase crystal structure; and a second gate stack comprising a second gate dielectric layer and a second gate conductor layer, wherein said second gate dielectric layer comprises a second rare-earth metal, and wherein said second gate dielectric layer has a substantially single-phase crystal structure; wherein said first semiconductor layer interposes said first gate dielectric layer and said second gate dielectric layer, and wherein said first gate dielectric layer interposes said first semiconductor layer and said first gate conductor layer, and further wherein said second gate dielectric layer interposes said first semiconductor layer and said second gate conductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A transistor structure comprising:
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a substrate comprises a lower gate conductor layer, and wherein said lower gate conductor layer has a substantially single-crystal crystal structure; a lower gate dielectric layer disposed on said lower gate conductor layer, wherein said lower gate dielectric layer comprises a first rare-earth metal, and wherein said lower gate dielectric layer has a substantially single-phase crystal structure; a first semiconductor layer disposed on said lower gate dielectric layer, wherein said first semiconductor layer comprises a first semiconductor, and wherein said first semiconductor layer has a substantially single-crystal crystal structure; an upper gate dielectric layer disposed on said first semiconductor layer, wherein said upper gate dielectric layer comprises a second rare-earth metal, and wherein said upper gate dielectric layer has a substantially single-phase crystal structure; and an upper gate conductor layer disposed on said upper gate dielectric layer. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. A transistor structure comprising:
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a first dielectric layer disposed on a substrate; a first semiconductor layer disposed on said first dielectric layer, wherein said first semiconductor layer has a substantially single-crystal crystal structure, and wherein said first semiconductor layer includes a source region and a drain region, and further wherein said first semiconductor layer has at least two sidewalls; a second dielectric layer, wherein said second dielectric layer is disposed on at least said two sidewalls of said first semiconductor layer, and wherein said second dielectric layer comprises a rare-earth metal, and further wherein said second dielectric layer has a substantially single-phase crystal structure; and a gate conductor layer, wherein said gate conductor layer is disposed on said second dielectric layer, and wherein said second dielectric layer interposes each of said two sidewalls and said gate conductor layer.
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32. A method comprising:
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forming a lower gate conductor layer, wherein said lower gate conductor layer has a substantially single-crystal crystal structure; forming a lower gate dielectric layer comprising a first rare-earth metal and having a single-phase crystal structure; forming an first semiconductor layer, wherein said first semiconductor layer has a substantially single-crystal crystal structure; and forming a source region and a drain region in said first semiconductor layer; wherein said lower gate dielectric layer interposes said lower gate conductor and said first semiconductor layer. - View Dependent Claims (33, 34, 35, 36, 37, 38, 39)
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Specification