User registers implemented with routing circuits in a configurable IC

• US 7,679,401 B1
• Filed: 12/01/2005
• Issued: 03/16/2010
• Est. Priority Date: 12/01/2005
• Status: Active Grant

• Current Assignee: Tahoe Research Limited (f/k/a Learndale Limited) (Vector Capital Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Redgrave, Jason
• Primary Examiner(s): Tan, Vibol
• Assistant Examiner(s): Crawford, Jason
• Application Number:
  US11/292,952
• Time in Patent Office: 1,566 Days
• Field of Search: 326 37- 41, 326/47, 327/115, 327/218, 327/298
• US Class Current: 326/40
• CPC Class Codes: H03K 19/17744 for input/output signals
• CPC Class Codes: H03K 19/1776 for memories

Abstract

Some embodiments of the invention provide a configurable integrated circuit (“IC”). The configurable IC includes a set of configurable logic circuits for configurably performing a set of functions. The configurable IC also includes a set of configurable routing circuits for routing signals to and from the configurable circuits. During several operational cycles of the configurable IC, a set of data registers are defined by the configurable routing circuits. These data registers may be used wherever a flip-flop can be used.

Claims

1. A configurable integrated circuit (“

IC”

) comprising;

a plurality of configurable logic circuits each for configurably performing a set of functions; and

a plurality of configurable routing circuits for configurably routing signals to and from said configurable circuits;

wherein a plurality of data registers are defined by the configurable routing circuits during a plurality of operational cycles of the configurable IC;

wherein the configurable routing circuits comprise a plurality of configurable interconnect/storage circuits, each configurable interconnect/storage circuit (i) communicatively coupling circuits of the configurable IC when configured as an interconnect circuit and (ii) storing data when configured as a storage circuit,

wherein an output of a first interconnect/storage circuit and an output of a second interconnect/storage circuit are connected to two inputs of a switching circuit to form a double-edge triggered flip flop.

2. The configurable IC of claim 1,

wherein a plurality of configurable logic circuits form a circuit arrangement;

wherein a plurality of said data registers serve as input/output registers that exchange data with circuits outside of the circuit arrangement.

3. The configurable IC of claim 2, wherein said circuits outside of the circuit arrangement are located outside the configurable IC.

4. The configurable IC of claim 2, wherein said circuits outside of the circuit arrangement are located inside the configurable IC.

5. The configurable IC of claim 1,

wherein at least one of said data registers is defined between a first configurable logic circuit and a second configurable logic circuit;

wherein said at least one data register receives a signal from the first configurable logic circuit, holds the signal for a period of time, and sends the signal to the second configurable logic circuit.

6. The configurable IC of claim 1, wherein the switching circuit is one of a configurable interconnect circuit and a configurable logic circuit.

7. The configurable IC of claim 1, wherein said configurable routing circuits are interconnect circuitry available throughout the IC fabric.

8. A configurable integrated circuit (“

IC”

) comprising;

a plurality of configurable logic circuits each for configurably performing a set of functions; and

a plurality of configurable routing circuits for configurably routing signals to and from said configurable circuits;

wherein a plurality of data registers are defined by the configurable routing circuits during a plurality of operational cycles of the configurable IC;

wherein the configurable routing circuits comprise a plurality of configurable interconnect/storage circuit, each configurable interconnect/storage circuit (i) communicatively coupling circuits of the configurable IC when configured as an interconnect circuit and (ii) storing data when configured as a storage circuit;

wherein a first configurable interconnect/storage circuit and a second configurable interconnect/storage circuit are communicatively coupled to form a single data register.

9. The configurable IC of claim 8, wherein an output of the first interconnect/storage circuit is directly passed to an input of the second interconnect/storage circuit.

10. The configurable IC of claim 8, wherein an output of the first interconnect/storage circuit is passed to an input of the second interconnect/storage circuit through at least one other interconnect/storage circuit.

11. The configurable IC of claim 8, wherein an output of the first interconnect/storage circuit is passed to an input of the second interconnect/storage circuit through at least one other configurable circuit.

12. An electronics system comprising:

a configurable integrated circuit (“

IC”

) comprising;

a plurality of configurable logic circuits each for configurably performing a set of functions; and

a plurality of routing circuits for routing signals to and from said configurable circuits;

wherein a plurality of data registers are defined by the routing circuits during a plurality of operational cycles of the configurable IC;

wherein the configurable routing circuits comprise a plurality of configurable interconnect/storage circuits, each configurable interconnect/storage circuit (i) communicatively coupling circuits of the configurable IC when configured as an interconnect circuit and (ii) storing data when configured as a storage circuit,

wherein an output of a first interconnect/storage circuit and an output of a second interconnect/storage circuit are connected to two inputs of a switching circuit to form a double-edge triggered flip flop.

13. The electronics system of claim 12,

wherein a plurality of configurable logic circuits form a circuit arrangement;

wherein a plurality of said data registers serve as input/output registers that exchange data with circuits outside of the circuit arrangement.

14. The electronics system of claim 12,

wherein at least one of said data registers is defined between a first configurable logic circuit and a second configurable logic circuit;

wherein said at least one data register receives a signal from the first configurable logic circuit, holds the signal for a period of time, and sends the signal to the second configurable logic circuit.

15. The electronics system of claim 12, wherein the switching circuit is one of a configurable interconnect circuit and a configurable logic circuit.

16. The electronics system of claim 12 further comprising a non-volatile memory for storing configuration data and for supplying configuration data to the configurable IC when the configurable IC powers up.

17. The electronics system of claim 16, wherein the non-volatile memory and the configurable IC are on different IC dies.

18. The electronics system of claim 16, wherein the non-volatile memory and the configurable IC are on the same IC die.

19. The electronics system of claim 12, wherein said routing circuits are interconnect circuitry available throughout the IC fabric.

20. An electronics system comprising:

a configurable integrated circuit (“

IC”

) comprising;

a plurality of configurable logic circuits each for configurably performing a set of functions; and

a plurality of routing circuits for routing signals to and from said configurable circuits;

wherein a plurality of data registers are defined by the routing circuits during a plurality of operational cycles of the configurable IC;

wherein the configurable routing circuits comprise a plurality of configurable interconnect/storage circuit, each configurable interconnect/storage circuit (i) communicatively coupling circuits of the configurable IC when configured as an interconnect circuit and (ii) storing data when configured as a storage circuit;

wherein a first configurable interconnect/storage circuit and a second configurable interconnect/storage circuit are communicatively coupled to form a single data register.

21. The electronics system of claim 20, wherein an output of the first interconnect/storage circuit is directly passed to an input of the second interconnect/storage circuit.

22. The electronics system of claim 20, wherein an output of the first interconnect/storage circuit is passed to an input of the second interconnect/storage circuit through at least one other interconnect/storage circuit.

23. The electronics system of claim 20, wherein an output of the first interconnect/storage circuit is passed to an input of the second interconnect/storage circuit through at least one other configurable circuit.