Error correction device and methods thereof
First Claim
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1. A method comprising:
- retrieving first uncorrected data from a first memory device during a first operational phase;
calculating first error correction data based on first error correction code (ECC) data associated with the first uncorrected data, the error correction data calculated during a second operational phase different from the first operational phase;
outputting the first uncorrected data from a bus interface device during the second operational phase, the bus interface device coupled between a bus and a plurality of different memory devices;
providing the first error correction data and the first uncorrected data to an error correction module during the second operational phase;
performing error correction on the outputted first uncorrected data based on the first error correction data at the error correction module during the second operational phase to determine first corrected data; and
providing the first corrected data to a bus master during a third operational phase.
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Abstract
A method of error correction includes retrieving raw data from a memory device during a first operational phase of the error correction device. The raw data is retrieved by a bus interface device that interfaces with a variety of memory devices. During a second operational phase, the raw data is outputted from the bus interface device to the bus master. In addition, error correction data is calculated, and error correction is performed on the raw data during the second operational phase. By retrieving the raw data before performing error correction, and by outputting the raw data during the same operational phase, data may be retrieved from the memory more rapidly.
114 Citations
20 Claims
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1. A method comprising:
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retrieving first uncorrected data from a first memory device during a first operational phase; calculating first error correction data based on first error correction code (ECC) data associated with the first uncorrected data, the error correction data calculated during a second operational phase different from the first operational phase; outputting the first uncorrected data from a bus interface device during the second operational phase, the bus interface device coupled between a bus and a plurality of different memory devices; providing the first error correction data and the first uncorrected data to an error correction module during the second operational phase; performing error correction on the outputted first uncorrected data based on the first error correction data at the error correction module during the second operational phase to determine first corrected data; and providing the first corrected data to a bus master during a third operational phase. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for error correction, comprising:
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receiving uncorrected data at a bus interface during a first operational phase, the bus interface adapted to be coupled between a bus and a plurality of different devices; receiving error correction data from an error correction code (ECC) module arranged substantially in parallel with the bus interface; performing error correction on the uncorrected data based on the error correction data to provide corrected data to the bus during a second operational phase. - View Dependent Claims (9, 10, 11, 12)
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13. A device, comprising:
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a first memory device; an error correction code (ECC) module comprising a first input coupled to the first memory device and an output; a bus interface arranged substantially in parallel with the error correction module, the bus interface comprising a first input to receive first uncorrected data from the memory and an output; a logic module comprising a first input coupled to the output of the bus interface to receive the first uncorrected data, a second input coupled to the output of the ECC module to receive error correction data, and an output to provide error corrected data. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification