Apparatus and method for implementing a unified hash algorithm pipeline
First Claim
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1. A cryptographic unit, comprising:
- hash logic configured to compute a hash value of a first data block according to a first hash algorithm, wherein said first hash algorithm is dynamically selectable from a plurality of hash algorithms, wherein said hash logic comprises pipelined adder logic having a plurality of pipeline stages, and wherein to compute said hash value of said first data block according to said first hash algorithm, said hash logic is further configured to perform multiple iterations within said pipelined adder logic, wherein for at least a given one of the iterations of the first hash algorithm, an input of the given iteration depends on an output of said pipelined adder logic produced by a preceding iteration; and
a word buffer configured to store said first data block during computing by said hash logic;
wherein said pipelined adder logic is configured such that during computation of said hash value of said first data block and after said multiple iterations begin, each of said plurality of pipeline stages is idle during one or more execution cycles;
wherein said hash logic is further configured to compute a hash value of a second data block according to a second hash algorithm, wherein to compute said hash value of said second data block according to said second hash algorithm, said hash logic is further configured to perform multiple iterations within said pipelined adder logic, wherein for at least a particular one of the iterations of the second hash algorithm, an input of the particular iteration depends on an output of said pipelined adder logic produced by a preceding iteration; and
wherein said hash logic is further configured to compute said hash value of said second data block during idle execution cycles of said plurality of pipeline stages that occur during computation of said hash value of said first data block, such that said hash logic is operable to concurrently compute hash values of said first data block and said second data block in an interleaved fashion.
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Abstract
An apparatus and method for implementing a unified hash algorithm pipeline. In one embodiment, a cryptographic unit may include hash logic configured to compute a hash value of a data block according to a hash algorithm, where the hash algorithm is dynamically selectable from a plurality of hash algorithms, and where the hash logic comprises a plurality of pipeline stages each configured to compute a portion of the hash algorithm. The cryptographic unit may further include a word buffer configured to store the data block during computing by the hash logic.
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Citations
32 Claims
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1. A cryptographic unit, comprising:
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hash logic configured to compute a hash value of a first data block according to a first hash algorithm, wherein said first hash algorithm is dynamically selectable from a plurality of hash algorithms, wherein said hash logic comprises pipelined adder logic having a plurality of pipeline stages, and wherein to compute said hash value of said first data block according to said first hash algorithm, said hash logic is further configured to perform multiple iterations within said pipelined adder logic, wherein for at least a given one of the iterations of the first hash algorithm, an input of the given iteration depends on an output of said pipelined adder logic produced by a preceding iteration; and a word buffer configured to store said first data block during computing by said hash logic; wherein said pipelined adder logic is configured such that during computation of said hash value of said first data block and after said multiple iterations begin, each of said plurality of pipeline stages is idle during one or more execution cycles; wherein said hash logic is further configured to compute a hash value of a second data block according to a second hash algorithm, wherein to compute said hash value of said second data block according to said second hash algorithm, said hash logic is further configured to perform multiple iterations within said pipelined adder logic, wherein for at least a particular one of the iterations of the second hash algorithm, an input of the particular iteration depends on an output of said pipelined adder logic produced by a preceding iteration; and wherein said hash logic is further configured to compute said hash value of said second data block during idle execution cycles of said plurality of pipeline stages that occur during computation of said hash value of said first data block, such that said hash logic is operable to concurrently compute hash values of said first data block and said second data block in an interleaved fashion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method, comprising:
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dynamically selecting a first hash algorithm from a plurality of hash algorithms; storing a first data block in a word buffer; computing a hash value of said first data block according to said first hash algorithm in pipelined adder logic having a plurality of pipeline stages, wherein computing said hash value of said first data block comprises performing multiple iterations within said pipelined adder logic, wherein for at least a given one of the iterations of the first hash algorithm, an input of the given iteration depends on an output of said pipelined adder logic produced by a preceding iteration, and wherein during computation of said hash value of said first data block and after said multiple iterations begin, each of said plurality of pipeline stages is idle during one or more execution cycles; computing a hash value of a second data block according to a second hash algorithm, wherein computing said hash value of said second data block comprises performing multiple iterations within said pipelined adder logic, wherein for at least a particular one of the iterations of the second hash algorithm, an input of the particular iteration depends on an output of said pipelined adder logic produced by a preceding iteration; wherein computing said hash value of said second data block occurs during idle execution cycles of said plurality of pipeline stages that occur during computation of said hash value of said first data block, such that computing of said hash values of said first data block and said second data block occurs concurrently in an interleaved fashion within said pipelined adder logic. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A system, comprising:
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a system memory; and a processor coupled to said system memory and comprising a cryptographic unit, said cryptographic unit comprising; hash logic configured to compute a hash value of a first data block according to a first hash algorithm, wherein said first hash algorithm is dynamically selectable from a plurality of hash algorithms, wherein said hash logic comprises pipelined adder logic having a plurality of pipeline stages, and wherein to compute said hash value of said first data block according to said first hash algorithm, said hash logic is further configured to perform multiple iterations within said pipelined adder logic, wherein for at least a given one of the iterations of the first hash algorithm, an input of the given iteration depends on an output of said pipelined adder logic produced by a preceding iteration; and a word buffer configured to store said first data block during computing by said hash logic; wherein said pipelined adder logic is configured such that during computation of said hash value of said first data block and after said multiple iterations begin, each of said plurality of pipeline stages is idle during one or more execution cycles; and wherein said hash logic is further configured to compute a hash value of a second data block according to a second hash algorithm, wherein to compute said hash value of said second data block according to said second hash algorithm, said hash logic is further configured to perform multiple iterations within said pipelined adder logic, wherein for at least a particular one of the iterations of the second hash algorithm, an input of the particular iteration depends on an output of said pipelined adder logic produced by a preceding iteration; wherein said hash logic is further configured to compute said hash value of said second data block during idle execution cycles of said plurality of pipeline stages that occur during computation of said hash value of said first data block, such that said hash logic is operable to concurrently compute hash values of said first data block and said second data block in an interleaved fashion. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32)
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Specification