Error correction coding for varying signal-to-noise ratio channels

• US 7,685,494 B1
• Filed: 05/07/2007
• Issued: 03/23/2010
• Est. Priority Date: 05/08/2006
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell International Limited (Marvell Technology Group Limited)
• Inventors: Burd, Gregory, Wu, Zining, Varnica, Nedeljko
• Primary Examiner(s): Abraham; Esaw T
• Application Number:
  US11/745,254
• Time in Patent Office: 1,051 Days
• Field of Search: 714/752, 714/704, 714/758
• US Class Current: 714/752
• CPC Class Codes: H03M 13/033 Theoretical methods to calculate these checking codes
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/1148 Structural properties of the code parity-check or generator matrix
• CPC Class Codes: H03M 13/353 Adaptation to the channel

Abstract

An error rate sensitive error correction (ERSEC) system that applies a level of error correction that is inversely related to susceptibility to error as indicated by a signal-to-noise ratio (SNR) profile of a channel. The SNR profile is estimated, detected or retrieved from an external source. The ERSEC system can be used with any channel for which the SNRs vary spatially, temporally or both.

Claims

1. A method for error correction coding, comprising:

obtaining a signal-to-noise ratio (SNR) profile for a channel that includes different SNR domains;

assigning at least two portions of a codeword to different SNR domains of the channel by a controller;

ordering the SNR domains according to SNR magnitudes; and

allocating by the controller higher levels of error correction to portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

2. The method of claim 1, further comprising generating the codeword using at least one of Hamming coding, Reed-Solomon coding, and regular low-density parity-check (LDPC) coding.

3. The method of claim 1, wherein allocating by the controller the higher levels of error correction to the portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes, further comprises:

allocating different codes to the portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

4. The method of claim 1, further comprising generating the codeword using irregular LDPC coding.

5. The method of claim 4, further comprising:

identifying variable nodes based on a parity-check matrix for the irregular LDPC coding; and

assigning variable nodes having higher degrees to the portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

6. The method of claim 5, further comprising:

permuting bits of the codeword based on the assignment between the portions of the codeword and the variable nodes.

7. The method of claim 5, further comprising:

selecting an H-matrix that includes a mixture of variable node degrees that is consistent with an allocation of levels of error correction; and

optimizing an assignment of the portions of the codeword to variable nodes of the selected H-matrix based on density evolution.

8. The method of claim 1, the obtaining the SNR profile comprising one or more of:

estimating the SNR magnitudes of the channel;

reading the SNR profile from a storage medium;

receiving the SNR profile from an external source; and

calculating the SNR magnitudes of the channel based on test results.

9. The method of claim 8, further comprising:

updating the SNR profile at one of periodically, in real time, and upon command.

10. The method of claim 9, further comprising adaptively changing the allocation of the levels of error correction for portions of the codeword based on an updated SNR profile.

11. An error rate sensitive error correction device, comprising:

a memory that stores a signal-to-noise ratio (SNR) profile for a channel that includes different SNR domains; and

a controller coupled to the memory, the controller;

assigns at least two portions of a codeword to different domains of the channel;

orders the SNR domains according to SNR magnitudes; and

allocates higher levels of error correction to portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

12. The error rate sensitive error correction device of claim 11, wherein the controller generates the codeword using at least one of Hamming coding, Reed-Solomon coding, and regular LDPC coding.

13. The error rate sensitive error correction device of claim 11, wherein the controller:

allocates different error correction codes to the portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

14. The error rate sensitive error correction device of claim 11, wherein the controller generates the codeword using irregular LDPC coding.

15. The error rate sensitive error correction device claim 14, wherein the controller:

identifies variable nodes based on a parity-check matrix for the irregular LDPC coding; and

assigns variable nodes having higher degrees to the portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

16. The error rate sensitive error correction device of claim 15, wherein the controller:

permutes bits of the codeword based on the assignment between the portions of the codeword and the variable nodes.

17. An error rate sensitive error correction device, comprising:

means for obtaining a signal-to-noise ratio (SNR) profile for a channel that includes different SNR domains;

means for assigning at least two portions of a data codeword to different SNR domains of the channel;

means for ordering the SNR domains according to SNR magnitudes; and

means for allocating higher levels of error correction to portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

18. The error rate sensitive error correction device of claim 17, further comprising means for generating the codeword using irregular LDPC coding.

19. The error rate sensitive error correction device of claim 18, further comprising:

means for identifying variable nodes based on a parity-check matrix for the irregular LDPC coding; and

means for assigning variable nodes having higher degrees to the portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

20. The error rate sensitive error correction device of claim 17, further comprising:

means for allocating different error correction codes to the portions of the codeword that are assigned to the SNR domains having smaller SNR magnitudes.

21. The error rate sensitive error correction device of claim 19 further comprising:

means for permuting bits of the codeword based on the assignment between the portions of the codeword and the variable nodes.

22. The error rate sensitive error correction device of claim 17, the means for obtaining the SNR profile comprising one or more of:

means for estimating the SNR magnitudes of the channel;

means for reading the SNR profile from a storage medium;

means for receiving the SNR profile from an external source; and

means for calculating the SNR magnitudes of the channel based on test results.

23. The error rate sensitive error correction device of claim 22, further comprising:

means for updating the SNR profile at one of periodically, in real time, and upon command.

24. The error rate sensitive error correction device of claim 23, further comprising means for adaptively changing an allocation of the levels of error correction for the portions of the codeword based on an updated SNR profile.

25. The error rate sensitive error correction device of claim 19, further comprising:

means for selecting an H-matrix that includes a mixture of variable node degrees that is consistent with an allocation of levels of error correction; and

means for optimizing an assignment of the portions of the codeword to variable nodes of the selected H-matrix based on density evolution.