Electronically programmable antifuse and circuits made therewith

• US 7,687,883 B2
• Filed: 01/26/2007
• Issued: 03/30/2010
• Est. Priority Date: 10/06/2003
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Abadeer, Wagdi W., Fifield, John A., Tonti, William R.
• Primary Examiner(s): Dickey; Thomas L
• Assistant Examiner(s): Erdem; Fazli
• Application Number:
  US11/627,723
• Publication Number:
  US 20070120221A1
• Time in Patent Office: 1,159 Days
• Field of Search: 257/530, 257/516, 257/528, 257/529, 257/E23.147, 438/547, 438/467
• US Class Current: 257/530
• CPC Class Codes: H01L 23/5252 comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

An antifuse device (120) that includes a bias element (124) and an programmable antifuse element (128) arranged in series with one another so as to form a voltage divider having an output node (F) located between the bias and antifuse elements. When the antifuse device is in its unprogrammed state, each of the bias element and antifuse element is non-conductive. When the antifuse device is in its programmed state, the bias element remains non-conductive, but the antifuse element is conductive. The difference in the resistance of the antifuse element between its unprogrammed state and programmed state causes the difference in voltages seen at the output node to be on the order of hundreds of mili-volts when a voltage of 1 V is applied across the antifuse device. This voltage difference is so high that it can be readily sensed using a simple sensing circuit (228).

Claims

1. An antifuse device operable at a voltage thereacross, comprising:

(a) a first element having a first conductive region, a second conductive region and a tunneling region located between said first and second conductive regions, said tunneling region operatively configured so that in an unprogrammed state a tunneling current is present between said first and second conductive regions of said first element when the voltage is applied across the antifuse device, and that in a programmed state said tunneling region is conductive between said first and second conductive regions when the voltage is applied across the antifuse device;

(b) a second element having a first conductive region, a second conductive region and a tunneling region located between said first and second conductive regions, said tunneling region operatively configured so that in an unprogrammed state a tunneling current is present between said first and second conductive regions of said second element when the voltage is applied across the antifuse device, and that in a programmed state said tunneling region is conductive between said first and second conductive regions when the voltage is applied across the antifuse device; and

(c) an output node electrically coupled between said first element and said second element.

2. A method of establishing a voltage at an output node of an antifuse device, the method comprising:

(a) providing a first element having a first conductive region, a second conductive region and a tunneling region located between said first and second conductive regions of said first element;

(b) providing a second element having a first conductive region, a second conductive region and a tunneling region located between said first and second conductive regions of said second element;

(c) coupling the output node between said first element and said second element; and

(d) applying a voltage across the antifuse device such that a tunneling current is present between said first and second conductive regions of said first and second elements.

3. A method according to claim 2, wherein said tunneling region of said first element has a first thickness and said tunneling region of said second element has a second thickness.

4. A method according to claim 3, further comprising:

(a) adjusting the ratio of said first thickness to said second thickness to adjust the voltage at the output node.

5. A method according to claim 2 further comprising:

(a) applying a programming voltage across the antifuse device, said programming voltage being of a magnitude sufficient to cause a dielectric breakdown within at least one of said tunneling region of said first and second elements.

6. A method according to claim 2 further comprising:

(a) allowing a programmed current to flow through the antifuse device.