Semiconductor device and a manufacturing method of the same
First Claim
1. A semiconductor device including a DC-DC converter, comprising:
- a first semiconductor chip including a high side MOSFET of the DC-DC converter and having a first gate electrode pad, a first source electrode pad and a first drain electrode of the high side MOSFET;
a second semiconductor chip including a low side MOSFET of the DC-DC converter and having a second gate electrode pad, a second source electrode pad and a second drain electrode of the low side MOSFET,the first source electrode pad of the first semiconductor chip and the second drain electrode of the second semiconductor chip being electrically coupled;
a third semiconductor chip including a first driver circuit driving the high side MOSFET and a second driver circuit driving the low side MOSFET, and having a first electrode pad electrically coupled to an output of the first driver circuit and a second electrode pad electrically coupled to an output of the second driver circuit,the first electrode pad of the third semiconductor chip and the first gate electrode pad of the first semiconductor chip being electrically coupled,the second electrode pad of the third semiconductor chip and the second gate electrode pad of the second semiconductor chip being electrically coupled;
a resin body covering the first, second and third semiconductor chips;
an input power supply terminal exposed from the resin body and electrically coupled to the first drain electrode of the first semiconductor chip;
a reference potential terminal exposed from the resin body and electrically coupled to the second source electrode pad of the second semiconductor chip; and
an output terminal exposed from the resin body and electrically coupled to the first source electrode pad of the first semiconductor chip and the second drain electrode of the second semiconductor chip,wherein a Schottky barrier diode is formed in the second semiconductor chip; and
an anode and a cathode of the Schottky barrier diode are electrically coupled to the second source electrode pad and the second drain electrode pad of the second semiconductor chip, respectively.
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Accused Products
Abstract
In a non-insulated DC-DC converter having a circuit in which a power MOS•FET high-side switch and a power MOS•FET low-side switch are connected in series, the power MOS•FET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOS•FET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOS•FET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.
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Citations
15 Claims
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1. A semiconductor device including a DC-DC converter, comprising:
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a first semiconductor chip including a high side MOSFET of the DC-DC converter and having a first gate electrode pad, a first source electrode pad and a first drain electrode of the high side MOSFET; a second semiconductor chip including a low side MOSFET of the DC-DC converter and having a second gate electrode pad, a second source electrode pad and a second drain electrode of the low side MOSFET, the first source electrode pad of the first semiconductor chip and the second drain electrode of the second semiconductor chip being electrically coupled; a third semiconductor chip including a first driver circuit driving the high side MOSFET and a second driver circuit driving the low side MOSFET, and having a first electrode pad electrically coupled to an output of the first driver circuit and a second electrode pad electrically coupled to an output of the second driver circuit, the first electrode pad of the third semiconductor chip and the first gate electrode pad of the first semiconductor chip being electrically coupled, the second electrode pad of the third semiconductor chip and the second gate electrode pad of the second semiconductor chip being electrically coupled; a resin body covering the first, second and third semiconductor chips; an input power supply terminal exposed from the resin body and electrically coupled to the first drain electrode of the first semiconductor chip; a reference potential terminal exposed from the resin body and electrically coupled to the second source electrode pad of the second semiconductor chip; and an output terminal exposed from the resin body and electrically coupled to the first source electrode pad of the first semiconductor chip and the second drain electrode of the second semiconductor chip, wherein a Schottky barrier diode is formed in the second semiconductor chip; and an anode and a cathode of the Schottky barrier diode are electrically coupled to the second source electrode pad and the second drain electrode pad of the second semiconductor chip, respectively. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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Specification