N-way Doherty distributed power amplifier

• US 7,688,135 B2
• Filed: 04/23/2008
• Issued: 03/30/2010
• Est. Priority Date: 04/23/2007
• Status: Active Grant

• Current Assignee: Dali Systems Co., Ltd.
• Original Assignee: Dali Systems Co., Ltd.
• Inventors: Stapleton, Shawn Patrick, Kim, Jong Heon, Cho, Kyoung Joon, Kim, Wan Jong
• Primary Examiner(s): Pascal; Robert
• Assistant Examiner(s): Nguyen; Hieu P
• Application Number:
  US12/108,507
• Publication Number:
  US 20080284509A1
• Time in Patent Office: 706 Days
• Field of Search: 330/295, 330/286, 330/124.R, 330 53- 54, 330/84
• US Class Current: 330/124.00R
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 1/3223 using feed-forward H03F1/3211 takes precedence
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/604 using FET's
• CPC Class Codes: H03F 3/607 using FET's
• CPC Class Codes: H04B 2001/0425 with linearisation using predistortion
• CPC Class Codes: H04B 2001/0441 with linearisation using feed-forward
• CPC Class Codes: H04B 2001/045 with means for improving efficiency

Abstract

A power amplifier using N-way Doherty structure for extending the efficiency region over the high peak-to-average power ratio of the multiplexing modulated signals such as wideband code division multiple access and orthogonal frequency division multiplexing is disclosed. In an embodiment, the present invention uses a dual-feed distributed structure to an N-way Doherty amplifier to improve the isolation between at least one main amplifier and at least one peaking amplifier and, and also to improve both gain and efficiency performance at high output back-off power. Hybrid couplers can be used at either or both of the input and output. In at least some implementations, circuit space is also conserved due to the integration of amplification, power splitting and combining.

Claims

1. An N-way Doherty distributed amplifier comprising:

an RF input,

at least one main distributed amplifier,

at least two peaking distributed amplifiers,

hybrid coupler responsive to an input signal for providing input to the at least one main distributed amplifier and the at least two peaking distributed amplifiers, respectively, and

phase synchronizer responsive to the RF input for synchronizing the phase between the at least one main distributed amplifier and the at least two peaking distributed amplifiers.

2. The N-way Doherty distributed amplifier of claim 1 wherein the RF input is single-ended dual-feed.

3. The N-way Doherty distributed amplifier of claim 1 wherein all transistors in the at least one main distributed amplifier and the at least two peaking distributed amplifiers operate substantially identically.

4. The N-way Doherty distributed amplifier of claim 1 wherein gain compression of the at least one main distributed amplifier is compensated by gain expansion of the at least two peaking distributed amplifiers.

5. The N-way Doherty distributed amplifier of claim 1 further comprising shunt capacitors operatively connected to the at least one main distributed amplifier and the at least two peaking distributed amplifiers, and wherein phase of the main and peaking distributed amplifiers is controlled by the capacitance of the shunt capacitors.

6. The N-way Doherty distributed amplifier of claim 1 wherein efficiency of the amplifier at various output back-off power is determined as a function of the number of the main and peaking amplifiers given by the following equation:

$\mathrm{\eta <br><br>}=\frac{\mathrm{\pi <br><br>}}{4}·<br><br>\left(\frac{P}{M}+1\right)·<br><br>\frac{v_o}{v_{\max }}$

wherein v_o and v_max are the output voltage and the maximum output voltage, respectively, M is the number of transistor for the main amplifier, and P the number of transistors for the peaking amplifier.

7. A N-way Doherty distributed amplifier of claim 1 wherein an extended back-off state X_BO is described by the following equation:

$X_{\mathrm{BO}}=20·<br><br>{\log }_{10}<br><br>\left(\frac{P}{M}+1\right).$

8. The N-way Doherty distributed amplifier of claim 1 wherein the N-way Doherty distributed amplifier configured as a main amplifier of a feed-forward linearization technique.

9. The N-way Doherty distributed amplifier of claim 1 wherein the N-way Doherty distributed amplifier receives an input from a digital pre-distorter.

10. The N-way Doherty distributed amplifier of claim 1 wherein the main distributed amplifiers and peaking distributed amplifiers one of a group comprising, first, separate miniature microwave integrated circuits and, second, one integrated MMIC.

11. The N-way Doherty distributed amplifier of claim 1 wherein the phase synchronizer delays the phase of the peaking amplifier later than the phase of the main amplifier by approximately 90°

.

12. The N-way Doherty distributed amplifier of claim 1 wherein the phase synchronizer comprises a λ

/4 microstrip line prior to the peaking amplifiers to synchronize the phases between the main distributed amplifiers and the peaking distributed amplifiers.

13. The N-way Doherty distributed amplifier of claim 1 further comprising input impedance matching circuits connected to front ends of the main distributed amplifiers and the peaking distributed amplifiers, respectively.

14. The N-way Doherty distributed amplifier of claim 1 further comprising gate and drain lines connected to the at least one main distributed amplifier and the at least two peaking distributed amplifiers, the gate and drain lines having a half-wave length at the center frequency of the power amplifier.

15. The N-way Doherty distributed amplifier of claim 1 further comprising output impedance matching circuits connected to at least one output of the at least one main distributed amplifier and the at least two peaking distributed amplifier.

16. The N-way Doherty distributed amplifier of claim 1 further comprising at least one offset line inserted between ends of the output impedance matching circuits for the main distributed amplifiers and the peaking distributed amplifiers to prevent leakage of power from the main distributed amplifier to the peaking distributed amplifier.

17. The N-way Doherty distributed amplifier of claim 1 further comprising a λ

/4 impedance transformer for characteristic impedance Z₀ connected to the offset lines.