Phase change memory cell and manufacturing method

• US 7,688,619 B2
• Filed: 12/18/2006
• Issued: 03/30/2010
• Est. Priority Date: 11/28/2005
• Status: Active Grant

• Current Assignee: Macronix International Co., Ltd.
• Original Assignee: Macronix International Co., Ltd.
• Inventors: Chen, Yi-Chou, Chen, Shih-Hung, Lung, Hsiang-Lan, Liu, Rich
• Primary Examiner(s): Dinh; Son
• Assistant Examiner(s): Byrne; Harry W
• Application Number:
  US11/612,093
• Publication Number:
  US 20070147105A1
• Time in Patent Office: 1,198 Days
• Field of Search: 365/46, 365/100, 365/148, 365/163, 365/94, 365/113, 365/129, 25 2- 5, 438/95, 438/96, 438/166, 438/365, 438/482, 438/486, 438/597, 438/29, 438/259, 977/754, 257 2- 5, 257/296, 257/E31.047, 257/E27.006
• US Class Current: 365/163
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 13/0028 Word-line or row circuits
• CPC Class Codes: G11C 2213/53 Structure wherein the resistive material being in a transistor, e.g. gate
• CPC Class Codes: G11C 2213/79 Array wherein the access device being a transistor
• CPC Class Codes: G11C 8/08 Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
• CPC Class Codes: G11C 8/10 Decoders
• CPC Class Codes: H10B 63/30 comprising selection components having three or more electrodes, e.g. transistors
• CPC Class Codes: H10B 63/80 Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
• CPC Class Codes: H10N 70/026 by physical vapor deposition, e.g. sputtering
• CPC Class Codes: H10N 70/043 by implantation
• CPC Class Codes: H10N 70/063 by etching of pre-deposited switching material layers, e.g. lithography
• CPC Class Codes: H10N 70/231 based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
• CPC Class Codes: H10N 70/823 adapted for essentially horizontal current flow, e.g. bridge type devices
• CPC Class Codes: H10N 70/826 adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
• CPC Class Codes: H10N 70/8825 Selenides, e.g. GeSe
• CPC Class Codes: H10N 70/8828 Tellurides, e.g. GeSbTe
• CPC Class Codes: H10N 70/884 based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors compounds of sulfur, selenium or tellurium, e.g. chalcogenides H10N70/882; oxides or nitrides H10N70/883

Abstract

A phase change memory cell includes first and second electrodes electrically coupled by a phase change element. At least a section of the phase change element comprises a higher reset transition temperature portion and a lower reset transition temperature portion. The lower reset transition temperature portion comprises a phase change region which can be transitioned, by the passage of electrical current therethrough, from generally crystalline to generally amorphous states at a lower temperature than the higher reset transition temperature portion. The phase change element may comprise an outer, generally tubular, higher reset transition temperature portion surrounding an inner, lower reset transition temperature portion.

Claims

1. A phase change memory cell, the memory cell being a part of a phase change memory device, comprising:

first and second electrodes;

a phase change element;

at least a section of the phase change element comprising a higher reset transition temperature portion electrically coupling the first and second electrodes and a lower reset transition temperature portion electrically coupling the first and second electrodes; and

the lower reset transition temperature portion comprising a phase change region which can be transitioned, by the passage of electrical current therethrough, from generally crystalline to generally amorphous states at a lower temperature than the higher reset transition temperature portion.

2. The phase change memory cell according to claim 1 wherein:

the first and second electrodes have surfaces spaced apart by a gap; and

the phase change element is positioned between the first and second electrodes.

3. The phase change memory cell according to claim 1 wherein the thermal conductivity of the higher reset transition temperature portion is greater than the thermal conductivity of the lower reset transition temperature portion when both are in generally crystalline states.

4. The phase change memory cell according to claim 1 wherein the thermal conductivity of the higher reset transition temperature portion is at least about 50% greater than the thermal conductivity of the lower reset transition temperature portion when both are in generally crystalline states.

5. The phase change memory cell according to claim 1 wherein the electrical resistivity of the higher reset transition temperature portion is greater than the electrical resistivity of the lower reset transition temperature portion when both are in generally crystalline states.

6. The phase change memory cell according to claim 1 wherein the electrical resistivity of the higher reset transition temperature portion is at least about 50% greater than the electrical resistivity of the lower reset transition temperature portion when both are in generally crystalline states.

7. The phase change memory cell according to claim 1 wherein the electrical resistance of the higher reset transition temperature portion is greater than the electrical resistance of the lower reset transition temperature portion when both are in generally crystalline states.

8. The phase change memory cell according to claim 1 wherein the electrical resistance of the higher reset transition temperature portion is at least about 50% greater than the electrical resistance of the lower reset transition temperature portion when both are in generally crystalline states.

9. The phase change memory cell according to claim 1 wherein the section of the phase change element comprises first and second of the higher reset transition temperature portion located on different sides of the lower reset transition temperature portion.

10. The phase change memory cell according to claim 1 wherein the higher reset transition temperature portion has an implantable element implanted therein, said implantable element being effectively absent from the lower reset transition temperature portion.

11. The phase change memory cell according to claim 10 wherein said implantable element comprises at least one of carbon, silicon, oxygen, nitrogen, aluminum.

12. The phase change memory cell according to claim 1 wherein the memory material comprises an alloy including a combination of two or more materials from the group of Ge, Sb, Te, Se, In, Ti, Ga, Bi, Sn, Cu, Pd, Pb, Ag, S, and Au.

13. The phase change memory cell according to claim 1 wherein the first and second electrodes comprise an element selected from a group consisting of Ti, W, Mo, Al, Ta, Cu, Pt, Ir, La, Ni, and Ru and alloys thereof.

14. The phase change memory cell according to claim 1 wherein the higher and lower reset transition temperature portions contact one another along a surface extending between the first and second electrodes.

15. The phase change memory cell according to claim 1 wherein the higher and lower reset transition temperature portions contact one another along a surface extending from the first electrode to the second electrode.

16. A phase change memory cell, the memory cell being a part of a phase change memory device, comprising:

first and second electrodes;

a phase change element electrically coupling the first and second electrodes;

at least a section of the phase change element comprising a higher reset transition temperature portion and a lower reset transition temperature portion;

the lower reset transition temperature portion comprising a phase change region which can be transitioned, by the passage of electrical current therethrough, from generally crystalline to generally amorphous states at a lower temperature than the higher reset transition temperature portion; and

the phase change element comprising an outer, generally tubular portion surrounding an inner portion, the outer portion comprising a higher reset transition temperature portion and the inner portion comprising a lower reset transition temperature portion.

17. A phase change memory cell, the memory cell being a part of a phase change memory device, comprising:

first and second electrodes having surfaces spaced apart by a gap;

a phase change element positioned between and electrically coupling the first and second electrodes;

the phase change element comprising an outer, generally tubular portion surrounding an inner portion, the outer portion comprising a higher reset transition temperature portion and the inner portion comprising a lower reset transition temperature portion, the reset transition temperature of the higher reset transition temperature portion being at least about 100°

C. greater than the reset transition temperature of the lower reset transition temperature portion; and

the lower reset transition temperature portion comprising a phase change region which can be transitioned, by the passage of electrical current therethrough, from generally crystalline to generally amorphous states at a lower temperature than the higher reset transition temperature portion.