Nonvolatile memory and semiconductor device including nonvolatile memory
First Claim
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1. A memory device comprising:
- a memory cell array including a memory cell comprising a memory element, a word line electrically connected to the memory cell, and a bit line electrically connected to the memory cell;
a word line driver circuit for driving the word line;
a bit line driver circuit for driving the bit line;
a writing circuit operationally connected to the bit line driver circuit and the word line driver circuit, the writing circuit comprising a wiring and a resistance element connected to the wiring in series connectable to the bit line through a switch; and
a voltage source input terminal for supplying a current to the memory element during a writing operation of the memory element through the wiring, the resistance element, and the bit line,wherein the resistance element is provided in the writing circuit.
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Abstract
An object is to provide a nonvolatile memory with reduced power consumption. The nonvolatile memory includes a memory element that has a low resistance state and a high resistance state, a writing circuit, a resistance element, a voltage source input terminal that inputs a writing voltage to the writing circuit, a bit line driver circuit that selects whether the memory element is connected to the writing circuit, and a word line driver circuit that selects whether or not writing is done in the memory element. With such as structure, power consumption during writing can be reduced, and a nonvolatile memory with low power consumption can be realized. Further, with such a nonvolatile memory, an active type wireless tag with a long lifetime of a battery or a passive type wireless tag with a wide communication range in which writing to a memory is possible, can be realized.
7 Citations
33 Claims
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1. A memory device comprising:
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a memory cell array including a memory cell comprising a memory element, a word line electrically connected to the memory cell, and a bit line electrically connected to the memory cell; a word line driver circuit for driving the word line; a bit line driver circuit for driving the bit line; a writing circuit operationally connected to the bit line driver circuit and the word line driver circuit, the writing circuit comprising a wiring and a resistance element connected to the wiring in series connectable to the bit line through a switch; and a voltage source input terminal for supplying a current to the memory element during a writing operation of the memory element through the wiring, the resistance element, and the bit line, wherein the resistance element is provided in the writing circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A memory device comprising:
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a memory cell array including a memory cell comprising a memory element, a word line electrically connected to the memory cell, and a bit line electrically connected to the memory cell; a word line driver circuit for driving the word line; a bit line driver circuit for driving the bit line; a writing circuit operationally connected to the bit line driver circuit and the word line driver circuit, the writing circuit comprising a wiring and a resistance element connected to the wiring in series connectable to the bit line through a switch; a reading circuit operationally connected to the bit line driver circuit via the switch; and a voltage source input terminal for supplying a current to the memory element during a writing operation of the memory element through the wiring, the resistance element, and the bit line, wherein the resistance element is provided in the writing circuit. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A memory device comprising:
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a memory cell array including a memory cell comprising a memory element, a transistor, a word line connected to the transistor, and a bit line connected to the memory element; a word line driver circuit for driving the word line; a bit line driver circuit for driving the bit line; a writing circuit operationally connected to the bit line driver circuit and the word line driver circuit, the writing circuit comprising a wiring and a resistance element connected to the wiring in series connectable to the bit line through a switch; a reading circuit operationally connected to the bit line driver circuit via the switch; and a voltage source input terminal for supplying a current to the memory element during a writing operation of the memory element through the wiring, the resistance element, the bit line, and the transistor, wherein the resistance element is provided in the writing circuit. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsKato, Kiyoshi
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Primary Examiner(s)Ho; Hoai V
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Assistant Examiner(s)Lappas; Jason
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Application NumberUS12/003,280Publication NumberTime in Patent Office837 DaysField of Search365/227, 365/230.06, 365/203US Class Current365/227CPC Class CodesG11C 17/16 using electrically-fusible ...G11C 17/165 Memory cells which are elec...
