Turbo-coding DOCSIS information for satellite communication

• US 7,694,210 B2
• Filed: 07/31/2002
• Issued: 04/06/2010
• Est. Priority Date: 07/31/2002
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Hartman, David L, Kwentus, Alan, Dale, Mark, Lin, Dorothy, Brescia, Rocco J Jr., Wang, Joyce, Chien, Jen-chieh, Gin, Alan
• Primary Examiner(s): Chase; Shelly A
• Application Number:
  US10/208,045
• Publication Number:
  US 20040022307A1
• Time in Patent Office: 2,806 Days
• Field of Search: 714/746, 714/755, 714/784, 714/786, 370/342, 370/465, 370/466
• US Class Current: 714/786
• CPC Class Codes: H04L 1/004 by using forward error control H04L1/0618 takes precedence; coding, decoding or code conversion, for error detection or correction H03M13/00
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0065 Serial concatenated codes
• CPC Class Codes: H04L 1/0066 Parallel concatenated codes
• CPC Class Codes: H04L 2025/0342 QAM
• CPC Class Codes: H04L 25/03343 Arrangements at the transmitter end
• CPC Class Codes: H04L 27/34 Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems

Abstract

Methods and systems for modifying DOCSIS-based transmission paths for communication in higher frequency and/or wireless environments, such as wireless terrestrial communication systems and satellite communication systems. An inner turbo-code is combined with a DOCSIS based Reed-Solomon (“RS”) forward error correction (“FEC”) coding scheme, to produce a concatenated turbo-RS code (other FEC codes can be utilized). In phase and quadrature phase (“I-Q”) processing is utilized to enable relatively low cost up-converter implementations. The I-Q processing is preferably performed at baseband, essentially pre-compensating for analog variations in the transmit path. Power amplifier on/off control capable of controlling on/off RF power control of remote transmitters is modulated on a transmit cable to reduce the need for a separate cable.

Claims

1. A method for processing data generated in compliance with a Data Over Cable Service Interface Specification (DOCSIS) standard, for satellite communication, comprising:

(1) receiving DOCSIS-compliant data encoded with a Reed-Solomon encoding scheme;

(2) turbo-encoding the DOCSIS-compliant data using an integrated circuit having a turbo encoder circuit;

(3) generating baseband-frequency in-phase and quadrature-phase components of the turbo-encoded DOCSIS-compliant data;

(4) interpolating the baseband-frequency in-phase and quadrature-phase components to a common sample rate that is higher than a plurality of DOCSIS-compliant bandwidth sample rates;

(5) digitally pre-compensating the common sample rate baseband-frequency in-phase and quadrature-phase components for impairments encountered in one or more subsequent processes;

(6) converting digitally pre-compensated common sample rate baseband-frequency in-phase and quadrature-phase components to one or more analog signals; and

(7) up-converting the one or more analog signals to a satellite frequency signal.

2. The method according to claim 1, wherein step (7) comprises:

(a) up-converting the one or more analog signals to a cellular telephone frequency signal; and

(b) up-converting the cellular telephone frequency signal to the satellite frequency signal.

3. The method according to claim 1, wherein step (7) comprises:

(a) up-converting the one or more analog signals to a first frequency signal having a frequency in a range of approximately 950 MHz to 1450 MHZ; and

(b) up-converting the first frequency signal to the satellite frequency signal.

4. The method according to claim 3, wherein step (7)(a) comprises up-converting the one or more analog signals to the first frequency signal using up-converter components designed for a cellular telephone.

5. The method according to claim 1, wherein step (5) comprises performing a programmable frequency shift operation on the common sample rate baseband-frequency in-phase and quadrature-phase components.

6. The method according to claim 5, wherein step (5) further comprises multiplying the common sample rate in-phase and quadrature-phase components by a complex exponential.

7. The method according to claim 1, wherein step (5) comprises performing amplitude and phase shift operations on the common sample rate baseband-frequency in-phase and quadrature-phase components.

8. The method according to claim 1, wherein step (5) comprises providing x/sin(x) compensation to the common sample rate baseband-frequency in-phase and quadrature-phase components, thereby compensating for digital-to-analog roll-off distortion encountered in the digital-to-analog converting.

9. The method according to claim 1, wherein step (5) comprises:

performing a programmable frequency shift operation on the common sample rate baseband-frequency in-phase and quadrature-phase components;

performing amplitude and phase shift operations on the common sample rate baseband-frequency in-phase and quadrature-phase components; and

providing x/sin(x) compensation to the common sample rate baseband-frequency in-phase and quadrature-phase components, thereby compensating for roll-off distortion encountered in the digital-to-analog converting.

10. The method according to claim 1, wherein step (3) comprises interleaving the baseband-frequency in-phase and quadrature-phase components, thereby reducing a number of pins needed to receive the in-phase and quadrature-phase components.

11. The method according to claim 1, wherein step (6) comprises rounding the digitally pre-compensated baseband-frequency in-phase and quadrature-phase components and converting the digitally rounded components to the one or more analog signals.

12. The method according to claim 3, further comprising:

(8) providing an amplifier on/off control signal and the first frequency signal through a common medium to an amplifier and to a satellite-frequency up-converter, respectively.

13. The method according to claim 12, wherein step (8) comprises selecting between a constant-voltage amplifier on/off control signal and a modulated on/off keyed amplifier control signal, wherein a frequency of the modulated on/off keyed amplifier control signal is different than the first frequency.

14. The method according to claim 12, wherein the modulated on/off keyed amplifier control signal is an on/off keyed sinusoid signal.

15. The method according to claim 12, wherein the modulated on/off keyed amplifier control signal is an on/off keyed square signal.

16. The method according to claim 12, wherein step (7) further comprises programming a lead time and a duration time for the amplifier on/off control signal.

17. The method according to claim 1, wherein step (1) comprises generating the DOCSIS-compliant information, and steps (1), (2), (4), and (5) are performed on a single integrated circuit.

34. The method according to claim 1, wherein steps (2), (4), and (5) are performed in an integrated circuit.

35. The method according to claim 1, wherein steps (2), (4), (5) and (6) are performed in an integrated circuit.

18. A system for processing data generated in compliance with Data Over Cable Service Interface Specification-type (DOCSIS) standards, for satellite communication, comprising:

a DOCSIS data generator module, including a Reed-Solomon encoding module, configured to generate Reed-Solomon encoded DOCSIS-compliant data;

a turbo-encoding circuit, in an integrated circuit, coupled to an output of the DOCSIS data generator module;

an in-phase and quadrature-phase modulator coupled to an output of the turbo encoding module, configured to generate baseband-frequency in-phase and quadrature-phase components of turbo/Reed-Solomon encoded DOCSIS-compliant data;

a digital processing module coupled to outputs of the in-phase and quadrature-phase modulator, the digital processing module including an interpolation module configured to interpolate the baseband-frequency in-phase and quadrature-phase components to a common sample rate that is higher than a plurality of DOCSIS-compliant bandwidth sample rates, the digital processing module configured to pre-compensate the common sample rate in-phase and quadrature-phase components for impairments encountered in subsequent components;

a digital-to-analog converter coupled to an output of the digital processing module; and

a frequency up-converter module coupled to an output of the digital-to-analog converter.

19. The system according to claim 18, wherein the frequency up-converter module comprises:

a first frequency up-converter coupled to the output of the digital-to-analog converter, configured to output a cellular telephone frequency signal in a range of approximately 950 MHz to 1450 MHZ; and

a satellite-frequency up-converter coupled to an output of the first frequency up-converter.

20. The system according to claim 19, wherein the first frequency up-converter uses off-the-shelf cellular telephone frequency components.

21. The system according to claim 18, wherein the digital processing module comprises a programmable frequency shift module coupled between the in-phase and quadrature-phase modulator and the digital-to-analog converter.

22. The system according to claim 21, wherein the programmable frequency shift module is configured to multiply the common sample rate in-phase and quadrature-phase components by a complex exponential.

23. The system according to claim 18, wherein the digital processing module comprises amplitude and phase shift modules coupled between the in-phase and quadrature-phase modulator and the digital-to-analog converter.

24. The system according to claim 18, wherein the digital processing module comprises an x/sin(x) compensation module coupled between the in-phase and quadrature-phase modulator and the digital-to-analog converter, configured to pre-compensate for sin(x)/x roll-off distortion is the digital-to-analog converter.

25. The system according to claim 18, wherein the digital processing module comprises:

a programmable frequency shift module including inputs coupled to outputs of the in-phase and quadrature-phase modulator;

amplitude and phase shift modules coupled to outputs of the programmable frequency shift module; and

a x/sin(x) module coupled between the amplitude and phase shift modules and the digital-to-analog converter.

26. The system according to claim 18, wherein the in-phase and quadrature-phase modulator is configured to interleave the in-phase and quadrature-phase components, thereby reducing a number of pins needed by the digital processing module to receive the in-phase and quadrature-phase components.

27. The system according to claim 18, wherein an output portion of the digital processing module comprises a digital rounding module including an output coupled to the digital-to-analog converter.

28. The system according to claim 18, wherein the turbo-encoding module and the digital processing module are implemented on a single integrated circuit chip.

29. The system according to claim 19, wherein:

the digital processing module comprises an amplifier on/off control signal generator; and

the frequency up-converter module includes a common-media output port that combines an output of the amplifier on/off control signal generator and an output of the cellular telephone frequency up-converter for transmission through a common media to the satellite frequency up-converter and to an amplifier coupled to the satellite frequency up-converter, respectively.

30. The system according to claim 29, wherein the amplifier on/off control signal generator comprises:

a selectable constant-voltage operation module configured to output the amplifier on/off control signal as constant-voltage levels; and

a selectable on/off keyed modulator configured to output the amplifier on/off control signal at a third frequency that is different than the cellular telephone frequency and the satellite frequency.

31. The system according to claim 30, wherein the on/off keyed modulator comprises a sinusoid on/off keyed modulator.

32. The system according to claim 30, wherein the on/off keyed modulator comprises a square-wave on/off keyed modulator.

33. The system according to claim 29, wherein the digital processing module further comprises a programmable lead time module and a programmable duration time module coupled to the amplifier on/off control signal generator.

36. The system according to claim 18, wherein said turbo-encoder module and said digital processing module are integrated on an integrated circuit chip.

37. The system according to claim 18, wherein said turbo-encoder module, said digital processing module, and said digital-to-analog converter are integrated on an integrated circuit chip.

38. A system for processing data generated in compliance with a Data Over Cable Service Interface Specification (DOCSIS) standard, for satellite communication, comprising:

means for receiving DOCSIS-compliant data encoded with a Reed-Solomon encoding scheme;

means for turbo-encoding the DOCSIS-compliant data;

means for generating baseband-frequency in-phase and quadrature-phase components of the turbo-encoded DOCSIS-compliant data;

means for interpolating the baseband-frequency in-phase and quadrature-phase components to a common sample rate that is higher than a plurality of DOCSIS-compliant bandwidth sample rates;

means for digitally pre-compensating the common sample rate baseband-frequency in-phase and quadrature-phase components for impairments encountered in one or more subsequent processes;

means for converting digitally pre-compensated common sample rate baseband-frequency in-phase and quadrature-phase components to one or more analog signals; and

means for up-converting the one or more analog signals to a satellite frequency signal.

39. A method for processing data generated in compliance with a Data Over Cable Service Interface Specification (DOCSIS) standard, for satellite communication, comprising:

(1) receiving DOCSJS-compliant data;

(2) encoding, using a DOCSIS-based integrated circuit, the DOCSIS-compliant data with a forward error correction code;

(3) generating baseband-frequency in-phase and quadrature-phase components of the encoded DOCSIS-compliant data;

(4) interpolating the baseband-frequency in-phase and quadrature-phase components to a common sample rate that is higher than a plurality of DOCSIS-compliant bandwidth sample rates;

(5) digitally pre-compensating the common sample rate baseband-frequency in-phase and quadrature-phase components for impairments encountered in one or more subsequent processes;

(6) converting digitally pre-compensated common sample rate baseband-frequency in-phase and quadrature-phase components to one or more analog signals; and

(7) up-converting the one or more analog signals to a satellite frequency signal.

40. The method according to claim 39, wherein step (2) comprises encoding the DOCSIS-compliant data with a convolutional code.

41. The method according to claim 39, wherein step (2) comprises encoding the DOCSIS-compliant data with a convolutional inner code and a Reed-Solomon outer code.

42. The method according to claim 41, wherein an error correcting ability of the Reed-Solomon outer code is set to zero.