Automatic modification of a graphical program based on corresponding changes to a diagram with states and state transitions

• US 7,694,273 B2
• Filed: 04/26/2007
• Issued: 04/06/2010
• Est. Priority Date: 12/20/2000
• Status: Expired due to Fees

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Kodosky, Jeffrey L., Hogan, Kevin
• Primary Examiner(s): Kang; Insun
• Application Number:
  US11/740,542
• Publication Number:
  US 20070198923A1
• Time in Patent Office: 1,076 Days
• Field of Search: 717/105, 717/109, 717/113, 715/763
• US Class Current: 717/113
• CPC Class Codes: G06F 8/10 Requirements analysis; Specification techniques
• CPC Class Codes: G06F 8/34 Graphical or visual programming

Abstract

A system and method for automatically generating a data flow diagram in response to a first diagram. The first diagram may specify one or more states and one or more state transitions, wherein each state transition specifies a transition from a first state to a second state. A data flow diagram may be automatically generated from the first diagram. A hardware description may be generated from the data flow diagram. The hardware description may be usable to configure a programmable hardware element such as, for example, a field-programmable gate array (FPGA). The configured programmable hardware element may implement a hardware implementation of the data flow diagram.

Claims

1. A method, comprising:

storing a first diagram, wherein the first diagram specifies a plurality of states and one or more transitions between the plurality of states, wherein the first diagram specifies first functionality;

storing a data flow diagram, wherein the data flow diagram comprises a plurality of nodes and connections between the nodes, wherein the data flow diagram specifies the first functionality, and wherein the data flow diagram and first diagram are separate and distinct;

modifying the first diagram; and

automatically modifying the data flow diagram based on said modifying the first diagram.

2. The method of claim 1, wherein the data flow diagram is executable by a processor to perform the first functionality.

3. The method of claim 2,

wherein the first diagram specifies at least two state transitions from a particular state;

wherein the first diagram also specifies a priority ordering for the at least two state transitions;

wherein during execution of the data flow diagram conditions associated with the at least two state transitions are evaluated in the specified priority ordering.

4. The method of claim 2,

wherein the first diagram further specifies one or more stop states;

wherein, if, during execution of the data flow diagram, one of the one or more stop states becomes active, the data flow diagram ceases execution.

5. The method of claim 1, wherein said modifying the first diagram modifies the first functionality, and wherein after said automatically modifying the data flow diagram, the data flow diagram specifies the modified first functionality.

6. The method of claim 5, wherein the data flow diagram is executable by a processor to perform the modified first functionality.

7. The method of claim 1,

wherein, for at least one state of the one or more states, the first diagram comprises program code associated with the at least one state;

wherein the data flow diagram program comprises the program code.

8. The method of claim 1, wherein a graphical user interface (GUI) is associated with the data flow diagram for providing input to the data flow diagram and displaying output from the data flow diagram, and wherein the method further comprises automatically modifying the GUI based on said modifying the first diagram.

9. The method of claim 1, wherein the plurality of nodes comprises at least one structure node, wherein the structure node represents control flow of data among one or more of the plurality of nodes.

10. The method of claim 9, wherein the structure node indicates iteration for the one or more of the plurality of nodes.

11. The method of claim 9, wherein the structure node indicates conditional branching for the one or more of the plurality of nodes.

12. The method of claim 9, wherein the structure node comprises a looping node, wherein the looping node indicates looping of the one or more of the plurality of nodes, wherein the looping node includes a loop condition which indicates a number of executions for the one or more of the plurality of nodes.

13. The method of claim 1,

wherein the first diagram comprises an executable program.

14. The method of claim 1,

wherein the first diagram represents a desired operation of a software program.

15. The method of claim 1, wherein the first diagram represents a desired operation of a hardware device.

16. The method of claim 1, wherein the first diagram represents a test sequence.

17. A memory medium comprising program instructions, wherein the program instructions are executable to:

store a first diagram, wherein the first diagram specifies a plurality of states and one or more transitions between the plurality of states, wherein the first diagram specifies first functionality;

store a data flow diagram, wherein the data flow diagram comprises a plurality of nodes and connections between the nodes, wherein the data flow diagram specifies the first functionality, and wherein the data flow diagram and first diagram are separate and distinct;

modify the first diagram in response to user input; and

automatically modify the data flow diagram based on said modifying the first diagram.

18. The memory medium of claim 17, wherein the data flow diagram is executable by a processor to perform the first functionality.

19. The memory medium of claim 17, wherein said modifying the first diagram modifies the first functionality, and wherein after said automatically modifying the data flow diagram, the data flow diagram specifies the modified first functionality.

20. A system, comprising:

a processor;

a memory medium coupled to the processor, wherein the memory medium comprises program instructions executable by the processor to;

receive a first diagram, wherein the first diagram specifies a plurality of states and one or more transitions between the plurality of states, wherein the first diagram specifies first functionality;

receive a data flow diagram, wherein the data flow diagram comprises a plurality of nodes and connections between the nodes, wherein the data flow diagram specifies the first functionality, and wherein the data flow diagram and first diagram are separate and distinct;

modify the first diagram; and

automatically modify the data flow diagram based on said modifying the first diagram.