Semiconductor device including a trench with a curved surface portion and method of manufacturing the same

• US 7,696,569 B2
• Filed: 09/19/2007
• Issued: 04/13/2010
• Est. Priority Date: 09/22/2006
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Elpida Memory Incorporated (Micron Technology, Inc.)
• Inventors: Ueda, Yasuhiko, Fujimoto, Hiroyuki
• Primary Examiner(s): Soward; Ida M
• Application Number:
  US11/902,167
• Publication Number:
  US 20080073709A1
• Time in Patent Office: 937 Days
• Field of Search: 257328-334, 257/E27.091
• US Class Current: 257/330
• CPC Class Codes: H01L 29/1037 and non-planar channel resulting from the gate electrode disposition, e.g. within a trench, H01L29/42356
• CPC Class Codes: H01L 29/66553 using inside spacers, permanent or not
• CPC Class Codes: H01L 29/66621 using etching to form a recess at the gate location etching of semiconductor bodies H01L21/302
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H10B 12/053 the transistor being at least partially in a trench in the substrate vertical transistor in combination with a capacitor formed in a substrate trench H10B12/0383
• CPC Class Codes: H10B 12/315 with the capacitor higher than a bit line
• CPC Class Codes: H10B 12/34 the transistor being at least partially in a trench in the substrate

Abstract

A semiconductor device includes a trench provided in a semiconductor substrate, a gate electrode formed in the trench through a gate dielectric film, and a diffusion layer formed in the vicinity of the trench. The trench includes an opening portion provided in a surface of the semiconductor substrate, a recess curved surface portion including a cross-sectional contour having a substantially circular arc shape, and a connection curved surface portion connecting the recess curved surface portion and the opening portion. The connection curved surface portion includes a continuous curved surface between the opening portion and the recess curved surface portion.

Claims

1. A semiconductor device comprising:

a trench provided in a semiconductor substrate;

a gate electrode formed in the trench through a gate dielectric film; and

a diffusion layer formed in a vicinity of the trench,

wherein the trench comprises;

an opening portion provided in a surface of the semiconductor substrate;

a recess curved surface portion comprising a cross-sectional contour having a substantially circular arc shape; and

a connection curved surface portion connecting the recess curved surface portion and the opening portion, and

wherein the connection curved surface portion comprises a continuous curved surface between the opening portion and the recess curved surface portion.

2. The semiconductor device as recited in claim 1, further comprising:

a trench gate transistor including the trench, the gate electrode and the diffusion layer,

wherein the semiconductor device comprises a dynamic random access memory using the trench gate transistor as a transfer gate transistor of a memory cell.

3. The semiconductor device as recited in claim 1, wherein a width of the connection curved surface portion gradually increases between the opening portion and the recess curved surface portion.

4. The semiconductor device as recited in claim 1, wherein a least width of the opening portion comprises a least width of the trench.

5. The semiconductor device as recited in claim 1, wherein a bottom of the diffusion layer is formed in a vicinity of the recess curved surface portion of the trench.

6. The semiconductor device as recited in claim 1, wherein the opening portion adjoins the connection curved surface portion at a location in the trench where a width of the trench includes a least width of the trench.

7. The semiconductor device as recited in claim 1, wherein a width of an opening of the connection curved surface portion comprises a minimum width of the trench.

8. The semiconductor device as recited in claim 7, wherein a distance between the opening of the connection curved surface portion and a center of the circular arc shape is greater than a radius of the circular are shape.

9. The semiconductor device as recited in claim 1, wherein the recess curved surface portion comprises a first portion which forms a bottom of the trench and comprises the substantially circular arc shape.

10. The semiconductor device as recited in claim 9, wherein the recess curved surface portion comprises a second portion comprising an arc shape having a radius which is greater than a radius of the circular arc shape of the first portion.

11. A semiconductor device, comprising:

a trench provided in a semiconductor substrate;

a gate electrode formed in the trench through a sate dielectric film; and

a diffusion layer formed in a vicinity of the trench,

wherein a cross-sectional contour of the trench is substantially U-shaped, a width of an opening portion of the trench is smaller than the width of a bottom portion of the trench, and a surface extending from the opening portion to the bottom portion comprises a continuous curved surface, and

wherein the surface extending from the opening portion to the bottom portion comprises a non-angular portion.

12. The semiconductor device as recited in claim 11, further comprising:

a trench gate transistor including the trench, the gate electrode and the diffusion layer,

wherein the semiconductor device comprises a dynamic random access memory using the trench gate transistor as a transfer gate transistor of a memory cell.

13. A trench structure for a trench gate transistor of a semiconductor device, the trench structure comprising:

an opening portion provided in a surface of a semiconductor substrate;

a recess curved surface portion comprising;

a first portion which forms a bottom of the trench structure and comprises the substantially circular arc shape; and

a second portion comprising an arc shape having a radius which is greater than a radius of the circular arc shape of the first portion; and

a connection curved surface portion connecting the second portion of the recess curved surface portion and the opening portion.

14. The trench structure according to claim 13, wherein the trench structure is formed in a semiconductor substrate of a trench gate transistor in a semiconductor device, the transistor further comprising:

a gate electrode formed in the trench structure; and

a diffusion layer formed in a vicinity of the trench structure, a bottom of the diffusion layer being farmed in a vicinity of the recess curved surface portion of the trench structure.

15. The trench structure according to claim 14, wherein the bottom of the diffusion layer is formed in a vicinity of the second portion of the recess curved surface portion of the trench structure.