Battery cell monitoring and balancing circuit

• US 7,696,725 B2
• Filed: 07/24/2006
• Issued: 04/13/2010
• Est. Priority Date: 06/19/2003
• Status: Active Grant

• Current Assignee: O2 Micro International Limited (O2 Micro Incorporated)
• Original Assignee: O2 Micro International Limited (O2 Micro Incorporated)
• Inventors: Li, Guoxing, Liu, Liusheng
• Primary Examiner(s): Tso; Edward
• Assistant Examiner(s): PIGGUSH, AARON C
• Application Number:
  US11/459,473
• Publication Number:
  US 20060255769A1
• Time in Patent Office: 1,359 Days
• Field of Search: 320/136, 320/157, 320/158, 320/162, 320/163
• US Class Current: 320/136
• CPC Class Codes: H01M 10/441 for several batteries or cells simultaneously or sequentially
• CPC Class Codes: H02J 7/0018 using separate charge circuits
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

A monitoring circuit for accurately monitoring a voltage level from each of a plurality of battery cells of a battery pack includes an analog to digital converter (ADC) and a processor. The ADC is configured to accept an analog voltage signal from each of the plurality of battery cells and convert each analog voltage signal to a digital signal representative of an accurate voltage level of each battery cell. The processor receives such signals and provides a safety alert signal based on at least one of the signals. The ADC resolution may be adjustable. A balancing circuit provides a balancing signal if at least two of the digital signals indicate a voltage difference between two cells is greater than a battery cell balance threshold. An electronic device including such monitoring and balancing circuits is also provided. Various methods are also provided.

Claims

1. A monitoring circuit for accurately monitoring a voltage level from each of a plurality of battery cells of a battery pack, said monitoring circuit comprising:

an analog to digital converter (ADC) configured to accept an analog voltage signal from each of said plurality of battery cells and convert each said analog voltage signal to a digital signal representative of a voltage level of each said battery cell; and

a processor configured to receive each said digital signal and to provide a safety alert signal based on at least one of said digital signals, said processor further configured to instruct at least one of a bleeding network circuit or a charge shuttling circuit to balance the voltage level from each of the plurality of battery cells, the bleeding network circuit and the charge shuttling circuit being operatively connected via a switch network, wherein said processor is further configured to generate a signal representing a desired resolution level of said ADC, wherein said signal from said processor is configured to increase said resolution of said ADC upon detection of an open circuit voltage condition and decrease said resolution of said ADC upon detection of an under-voltage condition.

2. The monitoring circuit of claim 1, wherein said safety alert signal is a charging alert signal if at least one of said digital signals is representative of a voltage level of one of said battery cells greater than an over voltage threshold value during a predetermined monitoring time interval while said battery pack is being charged.

3. The monitoring circuit of claim 2, wherein said charging alert signal is provided if one of said digital signals is representative of a voltage level of one of said battery cells greater than said over voltage threshold value while said battery pack is being charged.

4. The monitoring circuit of claim 2, wherein said over voltage threshold level is adjustable by said processor.

5. The monitoring circuit of claim 4, wherein said over voltage threshold level is adjustable by said processor based on ambient temperature.

6. The monitoring circuit of claim 1, wherein said safety alert signal is a discharge alert signal if at least one of said digital signals is representative of a voltage level of one of said battery cells less than an under voltage threshold value during a predetermined monitoring time interval while said battery pack is being discharged.

7. The monitoring circuit of claim 6, wherein said discharge alert control signal is provided if one of said digital signals is representative of a voltage level of one of said battery cells less than said under voltage threshold value while said battery pack is being discharged.

8. The monitoring circuit of claim 6, wherein said under voltage threshold level is adjustable by said processor.

9. The monitoring circuit of claim 8, wherein said under voltage threshold level is adjustable by said processor based on ambient temperature.

10. The monitoring circuit of claim 6, wherein said safety alert signal is a first discharge alert signal if at least one of said digital signals is representative of a voltage level of one of said battery cells less than a first under voltage threshold level during said predetermined monitoring time interval while said battery pack is being discharged, wherein said first under voltage threshold level is greater than said under voltage threshold level.

11. The monitoring circuit of claim 10, wherein said safety alert signal is a second discharge alert signal if at least one of said digital signals is representative of a voltage level of one of said battery cells less than a second under voltage level during said predetermined monitoring time interval while said battery pack is being discharged, wherein said second under voltage threshold level is less than first under voltage threshold level and greater than said under voltage threshold level.

12. The monitoring circuit of claim 1, wherein said ADC is an averaging type ADC.

13. The monitoring circuit of claim 12, wherein said averaging type ADC samples a voltage level for each battery cell a plurality of times over a sampling period before converting said analog voltage signal to an associated digital signal.

14. The monitoring circuit of claim 1, wherein:

said switch network is coupled between said battery pack and said ADC, said switch network having a plurality of switches controlled by said processor, said switch network enabling each of said plurality of battery cells to be directly coupled to said ADC through said switch network.

15. The monitoring circuit of claim 1, wherein said ADC has a positive input terminal and a negative input terminal, wherein a first offset value for a first battery cell is determined by coupling one terminal of said first battery cell to both said positive and said negative input terminals of said ADC, wherein said processor is further configured to apply said first offset value to a first digital signal representative of a voltage level of said first battery cell thereby providing a first calibrated digital signal.

16. The monitoring circuit of claim 15, wherein a second offset value for a second battery cell is determined by coupling one terminal of said second battery cell to both said positive and said negative input terminals of said ADC, wherein said processor is further configured to apply said second offset value to a second digital signal representative of a voltage level of said second battery cell thereby providing a second calibrated digital signal.

17. The monitoring circuit of claim 1, wherein said ADC samples a voltage level of each said battery cell once every sampling time period, wherein said sampling time period is adjustable by said processor.

18. The monitoring circuit of claim 17, wherein said sampling time period has a first time interval during a first condition, and said sampling time period has a second time interval during a second condition, said second time interval being longer than said first time interval and said second condition being a sleep mode of said battery pack.

19. The monitoring circuit of claim 1, further comprising:

a protection circuit configured to compare a signal representative of a current level associated with said battery pack to an over current threshold and to provide an over current alert signal to said processor if said current level is greater than said over current threshold.

20. The monitoring circuit of claim 19, wherein said protection circuit is further configured to compare a signal representative of said current level associated with said battery pack to a short circuit current threshold and to provide a short circuit current alert signal to said processor if said current level is greater than said short circuit current threshold.