System and method for linearizing a CMOS differential pair
First Claim
1. A system for generating a substantially linear differential pair amplifier output comprising:
- means for generating at least a first error correction current for a first output drain current of a main differential pair amplifier having a first common constant current source; and
means for generating at least a second error correction current for a second output drain current of said main differential pair amplifier;
wherein said first and second error correction currents are generated using a second common constant current source that is a fraction of the first common constant current source, the fraction based on at least one of a gate threshold voltage and a channel width of the main differential pair amplifier.
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Abstract
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.
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Citations
16 Claims
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1. A system for generating a substantially linear differential pair amplifier output comprising:
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means for generating at least a first error correction current for a first output drain current of a main differential pair amplifier having a first common constant current source; and means for generating at least a second error correction current for a second output drain current of said main differential pair amplifier; wherein said first and second error correction currents are generated using a second common constant current source that is a fraction of the first common constant current source, the fraction based on at least one of a gate threshold voltage and a channel width of the main differential pair amplifier. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method to optimize linearity of a differential pair amplifier output comprising:
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generating first and second output drain currents from a main differential pair amplifier having a first common constant current source; generating a first and second drain current from an auxiliary differential pair amplifier having a second common constant current source; combining said first drain current and said first output drain current and combining said second drain current and said second output drain current to generate a substantially linear output from said first and second output drain currents; wherein said second common constant current source is a fraction of said first common constant current source, the fraction based on at least one of a gate threshold voltage and a channel width of the main differential pair amplifier. - View Dependent Claims (10, 11, 12)
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13. An amplification system to generate a substantially linear output comprising:
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a main common source differential pair amplifier having a first constant current common source and first and second output drains; a first auxiliary common source differential pair amplifier having a second constant current common source; a second auxiliary common source differential pair amplifier having a third constant current common source; wherein a first and second output drains of said main common source differential pair amplifier are coupled to corresponding first and second drains of said auxiliary differential pair amplifiers; and wherein said second and third constant current common sources are a fraction of said first constant current common source. - View Dependent Claims (15, 16)
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14. An amplification system to generate a substantially linear output comprising:
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a main common source differential pair amplifier having a first constant current common source and first and second output drains; a first auxiliary common source differential pair amplifier having a second constant current common source; and a second auxiliary common source differential pair amplifier having a third constant current common source; wherein a first and second output drains of said main common source differential pair amplifier are coupled to corresponding first and second drains of said auxiliary differential pair amplifiers; and wherein amplitude of each of said first and second drain currents of said auxiliary differential pair amplifiers is a fraction of amplitude of said first and second output drain currents of said main differential pair amplifier.
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Specification