Adaptive radio transceiver with an antenna matching circuit

• US 7,697,900 B2
• Filed: 03/14/2008
• Issued: 04/13/2010
• Est. Priority Date: 10/21/1999
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Rofougaran, Maryam, Rofougaran, Ahmadreza, Moloudi, Shervin
• Primary Examiner(s): Milord; Marceau
• Application Number:
  US12/048,858
• Publication Number:
  US 20080182526A1
• Time in Patent Office: 760 Days
• Field of Search: 455/78, 455/73, 455/82, 455/86, 455/83, 455/313, 455/323, 455/76, 455/88, 333/109, 333/103, 333/116
• US Class Current: 455/78
• CPC Class Codes: H03B 21/01 by beating unmodulated signals of different frequencies
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 2200/318 A matching circuit being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 2203/45386 the AAC comprising one or more coils in the source circuit
• CPC Class Codes: H03F 2203/45526 the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45528 the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45638 the LC comprising one or more coils
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03G 11/00 Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
• CPC Class Codes: H03G 3/001 Digital control of analog signals
• CPC Class Codes: H03H 11/126 using a single operational amplifier H03H11/1204 takes precedence; parallel-T filters H03H11/1295
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 11/22 providing two or more phase shifted output signals, e.g. n-phase output
• CPC Class Codes: H03H 11/344 : Duplexers
• CPC Class Codes: H03H 2011/0494 : Complex filters
• CPC Class Codes: H03H 21/0001 : Analogue adaptive filters
• CPC Class Codes: H03H 21/0012 : Digital adaptive filters
• CPC Class Codes: H03H 2210/025 : Capacitor
• CPC Class Codes: H03H 2210/036 : Stepwise
• CPC Class Codes: H03H 7/42 : Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
• CPC Class Codes: H03J 2200/10 : Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03L 7/099 : concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/18 : using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence
• CPC Class Codes: H04B 17/104 : of other parameters, e.g. DC offset, delay or propagation times
• CPC Class Codes: H04B 17/14 : of the whole transmission and reception path, e.g. self-test loop-back
• CPC Class Codes: H04B 17/19 : Self-testing arrangements

Abstract

An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Claims

1. A method of wireless communications using a wireless communications device via at least one antenna, comprising:

continuously operatively coupling, with a substantially constant impedance, at least one output of a transmitter to at least one input of a receiver through at least one coupling circuit of the wireless communications device, each coupling circuit comprising a first node and a second node;

operatively coupling a transmission signal to the at least one antenna via the at least one output of the transmitter;

operatively coupling one of the at least one output of the transmitter to one of the first node of the at least one coupling circuit;

operatively coupling a receive signal to the at least one input of the receiver via the at least one antenna; and

operatively coupling one of the at least one input of the receiver to one of the second node of the at least one coupling circuit,

wherein the wireless communications device is capable of performing spread spectrum modulation and is capable of performing wireless radio frequency communications,

wherein the wireless communications device comprises CMOS circuitry, and

wherein the transmitter and the receiver are integrated on an integrated circuit chip of the wireless communications device.

2. The method according to claim 1, wherein the receiver and the transmitter are part of a wireless transceiver.

3. The method according to claim 2, wherein the wireless transceiver comprises an adaptive radio transceiver.

4. The method according to claim 2, wherein the wireless transceiver comprises a low intermediate frequency heterodyne architecture.

5. The method according to claim 2, wherein the wireless transceiver comprises a heterodyne complex architecture.

6. The method according to claim 1, wherein the wireless communications device is capable of performing orthogonal frequency division multiplexing.

7. The method according to claim 1, wherein the wireless communications device is capable of performing frequency hopping.

8. The method according to claim 7, wherein the wireless communications device is capable of performing direct sequence spread spectrum modulation.

9. The method according to claim 1, wherein the wireless communications device is capable of performing direct sequence spread spectrum modulation.

10. The method according to claim 1, wherein the at least one coupling circuit, the transmitter and the receiver are integrated on the integrated circuit chip.

11. The method according to claim 10, wherein the integrated circuit chip is a single integrated circuit chip.

12. The method according to claim 1, wherein the wireless communications device is capable of communicating over a wireless local area network.

13. The method according to claim 1, wherein the wireless communications device is capable of communicating over a personal area network.

14. The method according to claim 1, wherein the wireless communications device is capable of performing dynamic calibration.

15. The method according to claim 1, wherein the wireless communications device is capable of performing quadrature amplitude modulation.

16. The method according to claim 1, wherein the wireless communications device is capable of performing phase shift keying.

17. The method according to claim 1, comprising:

disabling the at least one output of the transmitter when the at least one input of the receiver is enabled; and

disabling the at least one input of the receiver when the at least one output of the transmitter is enabled.

18. The method according to claim 1,

wherein the transmitter comprises a power amplifier that provides one of the at least one output of the transmitter, and

wherein the receiver comprises a low noise amplifier that provides one of the at least one input of the receiver.

19. The method according to claim 18,

wherein one of the at least one output of the transmitter and one of the at least one input of the receiver comprise a differential line, and

wherein the method comprises interfacing the differential line to the at least one antenna using a matching circuit.

20. The method according to claim 19, wherein the at least one antenna comprises a single-ended antenna.

21. The method according to claim 19, wherein the matching circuit comprises a series capacitor and a shunt inductor operatively coupled to one of the differential lines, and a series inductor and a shunt capacitor operatively coupled to a second one of the differential lines.

22. The method according to claim 21, comprising:

disabling the at least one output of the transmitter when the at least one input of the receiver is enabled; and

disabling the at least input of the receiver when the at least one output of the transmitter is enabled.

23. The method according to claim 21, wherein the series capacitor, the shunt inductor, the series inductor and the shunt capacitor are arranged to substantially match an impedance of the antenna.

24. The method of claim 23, comprising:

compensating for a first capacitance of the at least one input of the receiver via a circuital arrangement of the series capacitor, the shunt inductor, the series inductor and the shunt capacitor when the at least one input of the receiver is disabled; and

compensating for a second capacitance of the at least one output of the transmitter via the circuital arrangement of the series capacitor, the shunt inductor, the series inductor and the shunt capacitor when the at least one output of the transmitter is disabled.

25. The method according to claim 21, wherein the at least one output of the transmitter comprises a differential transistor pair, each transistor of the differential transistor pair comprising a drain that is operatively coupled to a different one of the differential lines.

26. The method according to claim 25, wherein the at least one input of the receiver comprises a second differential transistor pair, each transistor of the second differential transistor pair comprising a gate that is operatively coupled to a different one of the differential lines.

27. The method according to claim 21, wherein the at least one input of the receiver comprises a differential transistor pair, each transistor of the differential transistor pair comprising a gate that operatively coupled to a different one of the differential lines.

28. The method according to claim 27, wherein the at least one output of the transmitter comprises a second differential transistor pair, each transistor of the second differential transistor pair comprising a drain that is operatively coupled to a different one of the differential lines.