Managing power consumption by requesting an adjustment to an operating point of a processor

• US 7,698,575 B2
• Filed: 03/30/2004
• Issued: 04/13/2010
• Est. Priority Date: 03/30/2004
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Samson, Eric C.
• Primary Examiner(s): Bae; Ji H
• Application Number:
  US10/814,425
• Publication Number:
  US 20050223249A1
• Time in Patent Office: 2,205 Days
• Field of Search: 713/300, 713/320, 713/322, 345/418
• US Class Current: 713/300
• CPC Class Codes: G06F 1/3228 Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A processor is provided with a workload that has a real-time demand. A processor clock frequency requirement is set for the processor, based on a deadline margin for the real-time demand. Other embodiments are also described and claimed.

Claims

1. A method for managing power consumption in an electronic system, comprising:

providing a first processor of the system with a first task to perform;

providing a second processor of the system with a second task to perform, wherein performance of the second task will use a result of performance of the first task;

requesting an adjustment to an operating point of one of the first and second processors to better manage power consumption in the electronic system, based on a time between completion of the second task and its deadline; and

signaling of an interrupt to the first processor by the second processor upon completion of the second task, wherein a clock speed of the first processor is repeatedly set while the first processor is performing a sequence of graphics tasks such that an actual deadline margin approaches zero.

2. The method of claim 1 wherein the requested adjustment is to decrease a frequency of a processor clock if said time indicates that the deadline was met.

3. The method of claim 1 wherein the requested adjustment is to increase a frequency of a processor clock if said time indicates that the deadline was not met.

4. The method of claim 1 wherein the first task relates to describing images and the second tasks relates to rendering images, the method further comprising computing the deadlines of the first and second tasks based on a target frame rate for displaying images.

5. The method of claim 1 further comprising measuring an amount of time needed for the first processor to complete the first task and the amount of time needed for the second processor to complete the second task, wherein the requested adjustment is based on said measurements.

6. A method comprising:

providing a first processor with a workload that has a real-time demand; and

setting a processor clock frequency requirement for the first processor based on a deadline margin for the real-time demand, wherein the deadline margin is a measurement of a time between (i) completion by the first processor of identifying one or more graphics surfaces in an image, and (ii) a start of rendering the one or more graphics surfaces wherein the first processor receives an interrupt from a second processor upon completion of the rendering the one or more graphics surfaces by the second processor, wherein a clock speed of the first processor is repeatedly set while the first processor is performing a sequence of graphics tasks such that the deadline margin approaches zero.

7. The method of claim 6 wherein the real-time demand is a target frame rate for displaying image frames.

8. The method of claim 7 wherein a second deadline margin is a measurement of a time between (i) completion by the second processor of rendering an image, and (ii) a start of displaying the image.

9. The method of claim 7 wherein a second deadline margin is computed based on (i) an estimate of a time needed by the second processor to render an image, and (ii) the target frame rate.

10. A system comprising:

a central processing unit (CPU);

a graphics controller coupled to the CPU;

a monitor coupled to the graphics controller; and

memory containing instructions that, when executed by the CPU, (i) identify models of surfaces to be rendered in an image, wherein the image is to be rendered by the graphics controller and then displayed on the monitor in accordance with a target frame rate, and (ii) specify an operating point for one of the CPU and graphics controller, based on a deadline margin for the target frame rate, wherein the graphics controller signals an interrupt to the CPU upon completion of at least one of rendering of the image and displaying of the image on the monitor, wherein a clock speed of the CPU is repeatedly set while the CPU is performing a sequence of graphics tasks such that the deadline margin approaches zero.

11. The system of claim 10 wherein the operating point is a value that represents one of (i) a clock frequency, (ii) an offset to the clock frequency, and (iii) a direction of increase or decrease in the clock frequency.

12. The system of claim 10 wherein the instructions, when executed by the CPU, specify the operating point of the graphics controller based on a time between when a rendering task is finished by the graphics controller and a deadline of the task.

13. The system of claim 12 wherein the instructions, when executed by the CPU, specify the operating point of the CPU based on a time taken by the CPU to finish specifying mathematical models of graphics objects in an image and a time taken by the graphics controller to render the image.

14. The system of claim 10 wherein the instructions, when executed by the CPU, specify the operating points for the CPU and the graphics controller, based on values recorded in the system that represent an actual elapsed time needed to completely render an image by the graphics controller and an actual elapsed time needed to complete an identification of models of graphics objects in said image by the processor.

15. The system of claim 10 wherein the operating point is one of a high performance mode and a low performance mode for the CPU.

16. The system of claim 15 wherein in the high performance mode, the CPU operates at a higher clock frequency and at a higher supply voltage than in the low performance mode.

17. An article of manufacture comprising:

a computer-readable storage device which has data that, when accessed by a processor, requests an operating point requirement for a target processor to (i) reduce power consumption by the target processor while the target processor performs a workload and (ii) meet a plurality of completion deadlines for a plurality of tasks in the workload, wherein the operating point requirement is based on an elapsed time between completion of a task and its deadline, and wherein the target processor signals an interrupt to the processor upon completion of at least one of the plurality of tasks, wherein a clock speed of the processor is repeatedly set while the processor is performing a sequence of graphics tasks such that an actual deadline margin approaches zero.

18. The article of manufacture of claim 17 wherein the data is to define the operating point requirement as a decrease in a frequency of an operating clock for the processor.

19. The article of manufacture of claim 17 wherein the data is part of a computer operating system program.

20. The article of manufacture of claim 17 wherein the data is part of a computer system driver program.