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Method and apparatus for timing and event processing in wireless systems

  • US 7,698,590 B2
  • Filed: 11/15/2007
  • Issued: 04/13/2010
  • Est. Priority Date: 08/29/2001
  • Status: Active Grant
First Claim
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1. A digital baseband processor comprising:

  • at least one main processor for executing instructions in a first instruction sequence; and

    a timing and event processor coupled to said main processor for executing timing-sensitive instructions in a second instruction sequence, said timing and event processor comprising;

    two or more instruction sequencers for executing threads of the second instruction sequence; and

    a time base generator for generating timing signals for initiating execution of instructions on each of the two or more instruction sequencers, wherein said time base generator is configured to use a unified time base derived from a plurality of time bases.

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