Low phase noise PLL synthesizer
First Claim
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1. A phase-locked loop frequency synthesizer comprising:
- a phase detector;
a low pass filter connected to the phase detector;
an amplifier connected to the low pass filter;
a voltage controlled oscillator (VCO) connected to the amplifier;
a power splitter connected to the VCO; and
,a switch that selects either a first or a second branch that connects the power splitter to the phase detector;
wherein,the first branch comprises a frequency divider; and
,the second branch comprises a mixer.
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Abstract
A low phase noise PLL synthesizer is described in which an initial tuning mechanism uses a conventional divider loop to lock a VCO to a desired output frequency. Once initial lock is achieved, the divider loop is switched out of the circuit in favor of a low phase noise mixer loop. The local oscillator signal for the mixer is derived from the same low phase noise source as the phase comparison frequency.
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Citations
11 Claims
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1. A phase-locked loop frequency synthesizer comprising:
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a phase detector; a low pass filter connected to the phase detector; an amplifier connected to the low pass filter; a voltage controlled oscillator (VCO) connected to the amplifier; a power splitter connected to the VCO; and
,a switch that selects either a first or a second branch that connects the power splitter to the phase detector; wherein, the first branch comprises a frequency divider; and
,the second branch comprises a mixer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A phase-locked loop frequency synthesizer comprising:
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a phase detector;
a low pass filter;
an amplifier;
a voltage controlled oscillator (VCO);an initial tuning loop comprising a frequency divider; and
,a mixer loop not including a frequency divider; wherein, the synthesizer switches between the initial tuning loop for frequency acquisition and the mixer loop for low phase noise performance; and
,the initial loop and the mixer loop lock the synthesizer to the same frequency.
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Specification