CMOS imager for cellular applications and methods of using such
First Claim
Patent Images
1. A CMOS imager, wherein the CMOS imager comprises:
- an image sensor;
a sub-sample control system, wherein the sub-sample control system is operable to identify one or more analog signals from the image sensor that are not processed;
a processing control system coupled to outputs of the image sensor, the sub-sample control system and a reference voltage; and
an analog processing circuit, configured to receive at least one of the reference voltage and one or more analog signals from the processing control system based on the output of the sub-sample control system, wherein the processing control system is operable to limit switching of the one or more inputs.
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Abstract
Systems, methods and devices related to detecting and transmitting images. Imaging system and devices, as well as methods of using such that are provided herein include flicker detection and/or correction; and/or built-in self test associated with various analog circuitry in the imaging devices; and/or power reduction ability; and/or pixels with charge evacuation functionality; and/or parallel to serial conversion unit and associated serial output interface; and/or other advanced functionality.
58 Citations
29 Claims
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1. A CMOS imager, wherein the CMOS imager comprises:
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an image sensor; a sub-sample control system, wherein the sub-sample control system is operable to identify one or more analog signals from the image sensor that are not processed; a processing control system coupled to outputs of the image sensor, the sub-sample control system and a reference voltage; and an analog processing circuit, configured to receive at least one of the reference voltage and one or more analog signals from the processing control system based on the output of the sub-sample control system, wherein the processing control system is operable to limit switching of the one or more inputs. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for processing images in a power sensitive application including a CMOS imager having a pixel array and an analog processing circuit, the method comprising:
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defining, by a sub-sample control system, a first portion and a second portion of the pixel array, wherein the first portion of the pixel array includes an output image area and the second portion of the pixel array includes a dropped image area;
receiving a pixel signal from the second portion of the pixel array; andplacing, by the sub-sample control system, the analog processing circuit in a standby mode when the analog pixel signal from the second portion of the pixel array is detected, wherein the analog pixel signal from the second portion of the pixel array is not processed. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A method for reducing power consumption in an imaging device having an image sensor and an analog processing circuit, the method comprising:
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sub-sampling the image sensor, by a sub-sample control system, wherein a first portion of the image sensor is not processed; receiving, by a processing control system, an analog image signal from the first portion of the image sensor; and placing, by the sub-sample control system, the analog processing circuit in a standby state when the analog image signal from the first portion of the pixel array is detected, wherein the analog image signal from the first portion is not processed. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29)
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Specification