System and method for suppressing load transients in radio frequency power amplifier switching power supplies

• US 7,701,690 B1
• Filed: 01/15/2008
• Issued: 04/20/2010
• Est. Priority Date: 01/15/2008
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Zirger, Arthur J., Li, Yushan
• Primary Examiner(s): Riley; Shawn
• Application Number:
  US12/008,843
• Time in Patent Office: 826 Days
• Field of Search: 323/283, 323/281, 323/276, 323/277, 323/266, 455/63.1, 361/159
• US Class Current: 361/159
• CPC Class Codes: G05F 1/56 using semiconductor devices in series with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: H02M 1/0045 Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

A system and a method are disclosed for suppressing load transients in radio frequency power amplifier switching power supplies. A power supply control circuit is provided that includes a switcher circuit and a low drop out circuit. Load transients are suppressed by generating a preload control signal that activates an active current source either in the switcher circuit or in the low drop out circuit. The active current source counteracts a decrease in the switcher operating voltage when a load transient is present. Load transients are also suppressed by generating a step control signal that activates a transistor in a feedback resistor divider network in the switcher circuit to increase the switcher operating voltage during a load transient. The preload and step control signals are reset when the load transient has ended.

Claims

1. A power supply control circuit comprising:

a low drop out circuit that comprises an operational amplifier having an output coupled to a low drop out transistor;

a switcher circuit having an output coupled to the low drop out circuit, the switcher circuit configured to provide a switcher operating voltage to the low drop out transistor; and

load transient suppression circuitry configured to suppress a load transient in the switcher operating voltage that is provided to the low drop out transistor, wherein the load transient suppression circuitry comprises;

a preload control signal circuit configured to generate a preload control signal;

an active current source responsive to the preload control signal;

a comparator configured to determine whether a specified load is present at the output of the low drop out circuit; and

a flip flop circuit configured to reset the preload control signal when the comparator determines that the specified load is present at the output of the low drop out circuit.

2. The power supply control circuit as set forth in claim 1, wherein the load transient suppression circuitry further comprises:

a step control signal circuit configured to generate a step control signal; and

a step transistor in a feedback resistor divider network that is responsive to the step control signal.

3. The power supply control circuit as set forth in claim 2, wherein the step transistor in the feedback resistor divider network is configured to be activated by the step control signal to increase the switcher operating voltage that is provided to the low drop out transistor when the load transient is present.

4. The power supply control circuit as set forth in claim 3, wherein the step transistor is coupled in parallel with a step resistor in the feedback resistor divider network.

5. The power supply control circuit as set forth in claim 3, wherein the step control signal circuit comprises:

a counter configured to determine whether the load transient has ended; and

a flip flop circuit configured to reset the step control signal when the counter determines that the load transient has ended.

6. The power supply control circuit as set forth in claim 2, wherein the feedback resistor divider network is located in the switcher circuit, and wherein the active current source is located in one of the switcher circuit and the low drop out circuit.

7. The power supply control circuit as set forth in claim 1, wherein the active current source is configured to be activated by the preload control signal to counteract a decrease in the switcher operating voltage when the load transient is present.

8. The power supply control circuit as set forth in claim 7, wherein the active current source comprises a current source having an output that is coupled to the low drop out transistor through a switch, the switch configured to be operated by the preload control signal.

9. The power supply control circuit as set forth in claim 1, wherein:

the comparator is configured to determine whether a power amplifier load is present at the output of the low drop out circuit; and

the flip flop circuit is configured to reset the preload control signal when the comparator determines that the power amplifier load is present at the output of the low drop out circuit.

10. The power supply control circuit as set forth in claim 9, wherein the comparator is configured to determine that the power amplifier load is present at the output of the low drop out circuit when a value of a ramp voltage signal exceeds a value of a threshold voltage.

11. A power supply control circuit comprising:

a low drop out circuit that comprises an operational amplifier having an output coupled to a low drop out transistor;

a switcher circuit having an output coupled to the low drop out circuit, the switcher circuit configured to provide a switcher operating voltage to the low drop out transistor; and

load transient suppression circuitry configured to suppress a load transient in the switcher operating voltage that is provided to the low drop out circuit, wherein the load transient suppression circuitry comprises;

a preload control signal circuit configured to generate a preload control signal;

an active current source responsive to the preload control signal;

a step control signal circuit configured to generate a step control signal; and

a step transistor in a feedback resistor divider network responsive to the step control signal.

12. The power supply control circuit as set forth in claim 11, wherein the active current source is configured to be activated by the preload control signal to counteract a decrease in the switcher operating voltage when the load transient is present.

13. The power supply control circuit as set forth in claim 12, wherein the active current source comprises a current source that has an output coupled to the low drop out transistor through a switch, the switch configured to be operated using the preload control signal.

14. The power supply control circuit as set forth in claim 11, wherein the preload control signal circuit comprises:

a comparator configured to determine whether a power amplifier load is present at the output of the low drop out circuit; and

a flip flop circuit configured to reset the preload control signal when the comparator determines that the power amplifier load is present at the output of the low drop out circuit.

15. The power supply control circuit as set forth in claim 14, wherein the comparator is configured to determine that the power amplifier load is present at the output of the low drop out circuit when a value of a ramp voltage signal exceeds a value of one half of a peak voltage.

16. The power supply control circuit as set forth in claim 11, wherein the feedback resistor divider network is located in the switcher circuit, and wherein the active current source is located in one of the switcher circuit and the low drop out circuit.

17. The power supply control circuit as set forth in claim 11, wherein the step control signal circuit comprises:

a counter configured to determine whether the load transient has ended; and

a flip flop circuit configured to reset the step control signal when the counter determines that the load transient has ended.

18. A method for operating a power supply control circuit, the method comprising the steps of:

operating a low drop out circuit that comprises an operational amplifier having an output coupled to a low drop out transistor;

providing a switcher operating voltage to the low drop out transistor using a switcher circuit; and

suppressing a load transient in the switcher operating voltage that is provided to the low drop out transistor by;

generating a step control signal; and

using the step control signal to activate a step transistor in a feedback resistor divider network to increase the switcher operating voltage that is provided by the switcher circuit when the load transient is present.

19. The method as set forth in claim 18, wherein the step of suppressing the load transient in the switcher operating voltage further comprises the steps of:

generating a preload control signal; and

using the preload control signal to activate an active current source to counteract a decrease in the switcher operating voltage when the load transient is present.

20. The method as set forth in claim 19, wherein the feedback resistor divider network is located in the switcher circuit, and wherein the active current source is located in one of the switcher circuit and the low drop out circuit.