Driving method using divided frame period

• US 7,705,821 B2
• Filed: 01/19/2006
• Issued: 04/27/2010
• Est. Priority Date: 01/31/2005
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd., Texas Instruments, Inc.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Endo, Masami
• Primary Examiner(s): Nguyen; Chanh
• Assistant Examiner(s): Yang; Kwang-Su
• Application Number:
  US11/275,615
• Publication Number:
  US 20060170622A1
• Time in Patent Office: 1,559 Days
• Field of Search: 345/87, 345/98, 345/99, 345/536, 345/539, 345/545, 345/547, 345/100
• US Class Current: 345/100
• CPC Class Codes: G09G 2360/126 The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

A driving method of a display device for performing time-division gray scale display is disclosed, which is capable of inputting accurate data into a panel by using one memory. M groups each having a pair of a first period and a second period are provided in one frame period. Video signals are written into a memory in the first period of at least one group among the m groups, while video signals are read out from the memory in the respective second periods of the m groups. The start timing of reading out video signals from the memory is synchronized with the start timing of each of the n sub-frame periods.

Claims

1. A driving method of a method of a display device comprising:

dividing each of a first frame period and a second frame period into m groups, with each of the m groups having a first period and a second period, wherein m is natural number not less than 2;

in the first frame period, writing a first video signal in a first memory area of a first memory in the first period of at least one of the m groups using a controller, wherein the first video signal is stored in a second memory;

in the first frame period, reading a second video signal from a second memory area of the first memory in the second period of at least one of the m groups using the controller, wherein the second video signal is written in a third memory;

in the second frame period, reading the first video signal from the first memory area of the first memory in the second period of at least one of the m groups using the controller, wherein the first video signal is written in the third memory; and

in the second frame period, writing a third video signal in the second memory area of the first memory in the first period of at least one of the m groups using the controller, wherein the third video signal is stored in the second memory,

wherein, in the first frame period, only writing of the first video signal is performed in the first memory area and only reading of the second video signal is performed in the second memory area,

wherein, in the second frame period, only reading of the first video signal is performed in the first memory area and only writing of the third video signal is performed in the second memory area,

wherein the first video signal or the third video signal stored in the second memory is written in the first memory in the first period of at least one of the m groups, and

wherein the first video signal or the second video signal stored in the first memory is written in the third memory in the second period of at least one of the m groups.

2. The driving method of a display device according to claim 1,

wherein, in the second frame period, the number of read operations of the first video signal from the first memory area of the first memory is larger than the number of write operations of the third video signal in the second memory area of the first memory.

3. The driving method of a display device according to claim 1,

wherein the first memory area has a first memory capacity to store the first video signal corresponding to a plurality of pixels,

wherein the second memory area has a second memory capacity to store the second video signal corresponding to the plurality of pixels, and

wherein the first video signal and the second video signal are video signals corresponding to different frame periods.

4. The driving method of a display device according to claim 3, wherein each of the plurality of pixels has a light-emitting element.

5. The driving method of a display device according to claim 1, wherein the second period is longer than the first period.

6. The driving method of a display device according to claim 1, wherein the first memory is an SRAM.

7. The driving method of a display device according to claim 1, wherein the first memory is a single-port memory.

8. The driving method of a display device according to claim 1, further comprising:

dividing each of the first period and the second frame period into n sub-frame periods, wherein n is a natural number not less than 2; and

synchronizing start timing of reading the second video signal from the second memory area with start timing of each of the n sub-frame periods.

9. The driving method of a display device according to claim 1, wherein the controller comprises a selector.

10. A driving method of a display device comprising:

dividing each of a first frame period and a second frame period into m groups, with each of the m groups having a first period and a second period, wherein m is a natural number not less than 2;

in the first frame period, writing a first video signal into a first memory area of a first memory in the first period of at least one of the m groups through a bus, wherein the first video signal is stored in a second memory;

in the first frame period, reading a second video signal from a second memory area of the first memory in the second period of at least one of the m groups through the bus, wherein the second video signal is written in a third memory;

in the second frame period, reading the first video signal from the first memory area of the memory in the second period of at least one of the m groups through the bus, wherein the second video signal is written in the third memory; and

in the second frame period, writing a third video signal the second memory area of the first memory in the first period of at least one of the m groups through the bus, wherein the third video signal is stored in the second memory,

wherein, in the first frame period, only writing of the first video signal is performed in the first memory area and only reading of the second video signal is performed in the second memory area,

wherein, in the second frame period, only reading of the first video signal is performed in the first memory area and only writing of the third video signal performed in the second memory area,

wherein the first video signal or the third video signal stored in the second memory is written in the first memory in the first period of at least one of the m groups, and

wherein the first video signal or the second video signal stored in the memory is written in the third memory in the second period of at least one of the m groups.

11. The driving method of a display device according to claim 10, wherein, in the second frame period, the number of read operations of the first video signal from the first memory area of the first memory is larger than the number of write operations of the third video signal in the second memory area of the first memory.

12. The driving method of a display device according to claim 10,

wherein the first memory area has a first memory capacity to store the first video signal corresponding to a plurality of pixels,

wherein the second memory area has a second memory capacity to store the second video signal corresponding to the plurality of pixels, and

wherein the first video signal and the second video signal are video signals corresponding to different frame periods.

13. The driving method of a display device according to claim 12, Wherein each of the plurality of pixels has a light-emitting element.

14. The driving method of a display device according to claim 10, wherein the second period is longer than the first period.

15. The driving method of a display device according to claim 10, wherein the first memory is an SRAM.

16. The driving method of a display device according to claim 10, wherein the first memory is a single-port memory.

17. The driving method of a display device according to claim 10, further comprising:

dividing each of the first framed period and the second framed period into n sub-framed periods, where n is a natural number not less than 2; and

synchronizing start timing of reading the second video signal from the second memory with start timing of each of the n sub-frame periods.

18. The driving method of a display device according to claim 10, wherein the bus connects the first memory and a selector.