Silicon wafer having through-wafer vias

• US 7,709,950 B2
• Filed: 09/02/2008
• Issued: 05/04/2010
• Est. Priority Date: 05/04/2005
• Status: Active Grant

• Current Assignee: IceMOS Technology Ltd
• Original Assignee: IceMOS Technology Ltd
• Inventors: Griffin, Hiugh J., Wilson, Robin, Brogan, Conor, MacNamara, Cormac
• Primary Examiner(s): Parekh; Nitin
• Application Number:
  US12/202,638
• Publication Number:
  US 20080315368A1
• Time in Patent Office: 609 Days
• Field of Search: 257/774, 257/704, 257/E23.181
• US Class Current: 257/704
• CPC Class Codes: B81B 2207/096 through the substrate
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]

Abstract

A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. A trench is formed in the semiconductor substrate at the first main surface. The trench extends to a first depth position in the semiconductor substrate. The trench is lined with the dielectric material. The trench is filled with a conductive material. An electrical component is electrically connected to the conductive material exposed at the first main surface. A cap is mounted to the first main surface. The cap encloses the electrical component and the electrical connection.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having first and second main surfaces opposite to each other;

at least one trench extending from the first main surface to a first depth position in the semiconductor substrate, the at least one trench defining a perimeter boundary around a portion of the semiconductor substrate;

at least one conductive via extending from the first main surface through the semiconductor substrate to the second main surface, the at least one conductive via being formed from the portion of the semiconductor substrate bounded by the at least one trench forming a perimeter boundary thereof;

a dielectric lining surrounding the at least one conductive via through the semiconductor substrate, the at least one conductive via being electrically isolated from the semiconductor substrate by the dielectric lining;

an electrical component electrically connected to the at least one conductive via at the first main surface; and

a cap sealed to the first main surface, the cap enclosing at least a portion of the electrical component and the electrical connection between the electrical component and the at least one conductive via.

2. The semiconductor device according to claim 1, wherein the at least one conductive via is at least partially doped with one of Boron and Phosphorous.

3. The semiconductor device according to claim 1, wherein the electrical component is one of an accelerometer, a gyroscope, a rate sensor, a pressure sensor, a resonator, a temperature sensor, and an optical sensor.

4. The semiconductor device according to claim 1, wherein the at least one trench is filled with at least one of undoped polysilicon, doped polysilicon, doped oxide, undoped oxide, silicon nitride and semi-insulating polycrystalline silicon (SIPOS).

5. The semiconductor device according to claim 1, wherein the perimeter boundary around the portion of the substrate is generally one of circular, triangular, rectangular, elliptical, polygonal and non-geometric/asymmetrical.

6. The semiconductor device according to claim 1, further comprising:

a second dielectric lining disposed on at least a portion of the first main surface surrounding the at least one trench.